Single-Phase Analog Pixel Counter for High-SNR Charge Accumulation

The patent divides the charge storage function into two separate capacitors: a first capacitor for initial charge accumulation and a second capacitor for final storage. This segmentation allows the first capacitor to be small (enabling small pixel size for high resolution) while the second capacitor provides sufficient charge storage capacity, thus resolving the contradiction between pixel size and photo-charge capacity.

The patent introduces a temporal dimension to charge storage by using a two-stage transfer process. Charge is first accumulated in the first capacitor during a brief period, then transferred to the second capacitor for long-term storage. This dimensional approach allows small in-pixel capacitance (for small pixels) to achieve effective large capacitance (for high charge capacity) through time-based charge accumulation and transfer.

The patent segments the capacitor system into two parts: a small first capacitor within the pixel for initial charge collection, and a larger second capacitor (located elsewhere) for final charge storage. This segmentation enables the pixel to maintain small area while the system achieves equivalent or greater total charge capacity, thereby improving SNR without increasing pixel area.

The first capacitor acts as an intermediary device that temporarily holds charge from the photodiode and then transfers it to the second capacitor. This intermediary approach allows the pixel to interface with small photodiodes (small area) while still achieving large effective capacitance through the second capacitor, thus improving SNR without increasing pixel area.

The patent extracts the complex ADC circuitry from the in-pixel location and places it downstream. The pixel itself only contains simple components (photodiode, first capacitor, transfer device), while the complex charge-to-digital conversion is performed externally. This extraction maintains simple in-pixel circuitry while still achieving improved charge storage capacity through the two-capacitor system.

The patent implements a self-service charge transfer mechanism where the first capacitor automatically transfers its charge to the second capacitor based on voltage threshold conditions, without requiring complex external control circuits. This self-service approach reduces device complexity by eliminating the need for complex timing and control logic while still achieving improved charge storage capacity.

The charge transfer device automatically controls the charge transfer process based on the voltage state of the first capacitor, without requiring external pulse width modulation or complex timing control. When the first capacitor voltage exceeds the transfer threshold, charge automatically transfers to the second capacitor, and this process repeats self-regulatingly. This self-service mechanism achieves precise charge transfer independent of pulse width while maintaining simple control circuitry.

The patent implements a feedback mechanism where the voltage across the first capacitor is continuously monitored, and when it exceeds the transfer threshold voltage, charge automatically transfers to the second capacitor. This feedback-based automatic control ensures precise charge transfer quantities independent of input pulse width while using simple voltage-threshold-based control logic rather than complex timing circuits.