Analog Product-Sum Semiconductor Circuit With Low Temperature Sensitivity
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Solution Overview
Problem
The increasing number of layers and neurons in artificial neural networks leads to high power consumption and heat generation, affecting circuit characteristics, necessitating a semiconductor device with low power consumption and reduced temperature sensitivity.
Innovation Solution
A semiconductor device incorporating transistors and capacitors with specific gate connections to perform arithmetic operations in a hierarchical neural network, utilizing analog currents and potentials to reduce power consumption and temperature sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of layers and neurons in artificial neural networks is increased to improve processing capability, then the computational power and accuracy are improved, but power consumption and heat generation increase
Solution Approach 1:
The patent replaces conventional CMOS transistor-based computing with a magnetic domain wall-based computing system. Magnetic domain walls move along nanowires in response to spin currents, enabling computation through magnetic rather than electrical mechanisms. This substitution fundamentally changes the energy consumption mechanism, as magnetic domain wall motion can achieve switching with lower energy dissipation compared to charge-based CMOS operations, thereby reducing power consumption while maintaining computational power.
Solution Approach 2:
The patent utilizes changes in magnetic parameters (domain wall position, magnetization direction) to represent and process information. By controlling the movement and interaction of magnetic domain walls through applied fields and spin currents, the system achieves computational functions with different energy characteristics than conventional voltage-based logic, enabling reduced power consumption at high computational throughput.
2Productivity
If the number of circuits on a chip is increased to enhance neural network capacity, then the processing ability is improved, but heat generation increases and affects circuit characteristics
Solution Approach 1:
The patent substitutes electrical current-based switching with magnetic domain wall-based switching. Magnetic domain walls can be moved and manipulated with lower energy input, generating less heat per operation. This allows for higher density circuit integration without the thermal accumulation problems that plague conventional CMOS-based neural networks, as the magnetic mechanism inherently dissipates less energy as heat during switching operations.
3Ease of manufacture
If conventional CMOS transistors are used to implement neural network circuits, then manufacturing compatibility is maintained, but temperature sensitivity increases and affects circuit characteristics
Solution Approach 1:
The patent employs composite material structures combining magnetic materials (for domain wall formation and motion) with semiconductor materials (for spin current generation and control). This composite approach integrates the beneficial properties of both material systems: magnetic materials provide temperature-stable domain wall behavior, while semiconductor materials enable efficient spin current generation. The composite structure achieves reduced temperature sensitivity while remaining compatible with existing semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves low power consumption and reduced temperature sensitivity, enabling efficient operation of hierarchical neural networks with improved circuit performance.
Implementation Method 1
The first transistor includes a first gate and a second gate. The first gate of the first transistor is electrically connected to a first input wiring. The second gate of the first transistor is electrically connected to a first terminal of the second transistor and a first terminal of the first capacitor. The first circuit has a function of holding a first potential of the first terminal of the first capacitor and the second gate of the first transistor when the second transistor is brought into an off state and a function of bringing the first transistor into one of an on state and an off state in accordance with the first potential and a second potential input to the first input wiring.
Implementation Method 2
The first circuit has a function of holding a first potential of the first terminal of the first capacitor and the second gate of the first transistor
Data Source
AI summary
A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits. The first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When potentials corresponding to second data are input to the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring, and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output by the first and second circuits to the first wiring and the second wiring are determined in accordance with the first and second potentials held at the first and second nodes.