Analog Switch Backgate Control for Flat On-Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional CMOS analog switches exhibit significant changes in conduction resistance with varying input voltage and power supply voltage, leading to poor flatness, which is a critical issue for maintaining consistent performance across different voltage conditions.
Innovation Solution
The proposed analog switching circuit employs an NMOS and PMOS configuration with backgate voltage control circuits to regulate the conduction resistance, using logic circuits and control signals to manage the backgate voltages of the transistors based on input and switching control signals, ensuring consistent performance across different voltage conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional CMOS analog switch uses parallel NMOS and PMOS configuration, then bidirectional signal transfer is enabled, but conduction resistance changes significantly with input voltage and power supply voltage
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the backgate voltage of the PMOS transistor based on the input signal voltage level. When the input voltage changes, the backgate voltage is adjusted accordingly to compensate for the resulting conduction resistance changes, thereby maintaining relatively flat overall conduction resistance across different voltage conditions.
Solution Approach 2:
The patent implements feedback control where the input signal voltage is detected and used to control the backgate voltage of the PMOS transistor. This feedback mechanism automatically adjusts the transistor parameters to compensate for voltage variations, ensuring stable conduction resistance without requiring external intervention.
2Use of energy by moving object
If power supply voltage is decreased to 5 volts, then energy consumption is reduced, but conduction resistance increases significantly to about 8 ohms
Solution Approach 1:
The patent changes the operating parameters of the PMOS transistor by adjusting its backgate voltage according to the input signal level. This parameter adjustment compensates for the increased conduction resistance caused by lower power supply voltage, enabling the analog switch to maintain acceptable performance at 5 volts while consuming less energy.
3Reliability
If backgate voltage control circuits are added to regulate conduction resistance, then conduction resistance flatness is improved, but device complexity increases
Solution Approach 1:
The patent merges the backgate voltage control function with the existing analog switch structure by integrating the control circuitry that uses the input signal itself to regulate the backgate voltage. This integration approach reduces the need for separate external control components and simplifies the overall device structure while achieving improved conduction resistance flatness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively maintains a relatively flat conduction resistance across a range of input voltages and power supply voltages, improving the circuit's performance and reliability.
Implementation Method 1
N-type metal oxide semiconductor field effect transistor (NMOS) having a source, a drain, a gate and a backgate... P-type metal oxide semiconductor field effect transistor (PMOS) having a source, a drain, a gate and a backgate
Implementation Method 2
the first control circuit is configured to control the backgate voltage of the NMOS based on the input signal and the switching control signal... the second control circuit is configured to control the backgate voltage of the PMOS based on the input signal and the switching control signal
Data Source
AI summary
The present invention discloses an analog switching circuit having a first terminal receiving an input signal, a second terminal providing an output signal and a control terminal receiving a switching control signal. The analog switching circuit has a first logic circuit providing a first control signal and a second control signal based on the switching control signal; an NMOS and a PMOS coupled between the first terminal and the second terminal, and controlled by the first control signal and the second control signal respectively; a first control circuit controls the backgate voltage of the NMOS based on the input signal and the switching control signal; and a second control circuit controls the backgate voltage of the PMOS based on the input signal and the switching control signal.


