Bi-Directional Analog Switch With Minimal Gate-Drive Circuit

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Solution Overview

Problem

Existing gate drivers for transistors require complex circuits and large wafer area to provide turn-on and turn-off voltages within a predetermined range, risking transistor damage if voltages fall outside this range.

Innovation Solution

A bi-directional switch using a control circuit and transmission gate with n-type and p-type transistors, which provides gate voltages slightly greater than the minimal magnitude needed to conduct, ensuring quick and accurate opening and closing of the transmission gate, thus extending transistor lifetime and reducing circuit complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex gate driver circuits are used to provide turn-on and turn-off voltages within a predetermined range, then transistor reliability is improved, but device complexity and wafer area increase

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the gate driver functionality into multiple independent transistor stages (first transistor for turn-on, second transistor for turn-off) with separate control circuits. Each transistor handles a specific voltage transition task, allowing the complex voltage control function to be segmented into simpler, manageable components that reduce overall circuit complexity while maintaining reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate control circuits that generate gate voltages based on control signals. These intermediary control circuits act as mediators between the control signal and the power transistors, providing the necessary voltage transformation and protection functions without requiring complex direct control of the power transistors themselves

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If complex gate driver circuits are used to provide turn-on and turn-off voltages within a predetermined range, then voltage control precision is improved, but wafer area increases

Engineering Contradiction:
Improvevoltage control precisionVSAvoidwafer area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent combines multiple transistors (n-type and p-type) and their control circuits into an integrated transmission gate structure. This merging of components achieves precise voltage control for both turn-on and turn-off operations while reducing the total wafer area compared to separate discrete gate driver circuits for each transistor

Inventive Principle:
Principle #5Merging (Combining)

3Duration of action of stationary object

If gate voltages slightly greater than minimal magnitude are used, then transistor lifetime is extended, but switching speed may be reduced

Engineering Contradiction:
Improvetransistor lifetimeVSAvoidswitching speed
Core Design Contradiction:
Duration of action of stationary objectVSSpeed

Solution Approach 1:

The patent employs dynamic control of gate voltages through multi-stage transistor switching. The control circuits dynamically adjust the gate voltage magnitude and timing - applying slightly greater than minimal voltage magnitudes that are optimized for each switching event, thereby extending transistor lifetime while maintaining adequate switching speed through dynamic rather than static voltage control

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250373247A1Analog switch
Publication Date: 2025.12.04 TEXAS INSTRUMENTS INC
  • US20250373247A1 patent drawing
  • US20250373247A1 patent drawing
  • US20250373247A1 patent drawing

AI summary

A circuit includes first and second n-type transistors, and first and second p-type transistors. A first terminal of the second n-type transistor is coupled to a second terminal of the first n-type transistor. Control terminals of the first and second n-type transistors are coupled. A first terminal of the first p-type transistor is coupled to a first terminal of the first n-type transistor. A first terminal of the second p-type transistor is coupled to a second terminal of the first p-type transistor. A second terminal of the second p-type transistor is coupled to a second terminal of the second n-type transistor. Control terminals of the first and second p-type transistors are coupled. A control circuit has a first output coupled to the control terminals of the first and second n-type transistors, and a second output coupled to the control terminals of the first and second p-type transistors.