Analog Switch Guard Circuit for Power-Sequence Immunity
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Solution Overview
Problem
In computing systems, CMOS switches used for receiving analog input signals face increased power consumption due to parasitic diode currents when the input signal voltage exceeds the power supply voltage, leading to inefficient energy management during changes in operating modes and states.
Innovation Solution
Incorporating a guard p-type device in series with the output p-type device to prevent forward biasing of parasitic diodes by ensuring the body terminal is driven to a logic high level, regardless of input signal voltage levels, thereby preventing parasitic diode current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the switch receives analog input signals before receiving an updated power supply voltage, then the switch can receive input signals during mode transitions, but parasitic diode currents flow when input signal amplitudes exceed power supply voltage, increasing power consumption
Solution Approach 1:
A guard p-type device is introduced as an intermediary between the input signal and the output p-type device. This guard device acts as a mediator that prevents the input signal from directly forward-biasing the parasitic diode of the output device when the power supply voltage is still at logic low level, thus eliminating the harmful current path while allowing signal transmission after power stabilization.
Solution Approach 2:
The guard p-type device is configured to preemptively block the harmful effect before it occurs. By positioning the guard device to monitor and control the voltage conditions at the body terminal of the output p-type device, the system prevents forward biasing of the parasitic diode in advance, before the power supply voltage transition completes, thereby avoiding the power consumption issue entirely.
2Device complexity
If the body terminal of the p-type device is connected to the power supply voltage, then the circuit is simplified, but the parasitic diode becomes forward biased when input signal voltage exceeds power supply voltage
Solution Approach 1:
The body terminal connection is segmented into two separate connections: one for the output p-type device body terminal connected to the power supply voltage, and another for the guard p-type device body terminal connected to the input signal. This segmentation allows independent voltage control of each device, preventing the parasitic diode forward biasing issue while maintaining circuit functionality.
Solution Approach 2:
The guard p-type device serves as an intermediary that decouples the direct connection between the input signal and the output device's body terminal. This intermediary structure allows the output device body terminal to remain firmly connected to the power supply voltage for stability, while the guard device monitors and prevents harmful current flow by controlling the input signal path.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces power consumption by preventing parasitic diode currents from flowing, ensuring efficient reception and transmission of analog input signals across varying operating modes and states without increasing power supply voltage.
Implementation Method 1
the devices include parasitic diodes. For example, the p-type device includes a p-to-n diode, or PN diode, from a p-type region used as a source or drain terminal to the n-type well used for the body of the device
Data Source
AI summary
A system and method for efficiently receiving analog input signals. In various embodiments, a functional unit includes a switch in its interface logic. The switch receives an analog input signal, and when enabled, conveys the received input signal as an analog output signal. The switch is enabled when the received enable signal is asserted. However, when the power supply voltage is at a logic low level, an output n-type device is disabled while an output p-type device is enabled. A guard p-type device serially connected with the output p-type device is disabled by other devices used to control the guard p-type device. The control devices also ensure that the body terminals of the guard p-type device and other p-type devices receive a logic high level regardless of the power supply value, which prevents forward bias currents in parasitic diodes of the p-type devices.