Analog Switch Multiplexer Circuit for High-Voltage FET Gate Control
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Solution Overview
Problem
Analog switch circuits face limitations in handling analog signals above 3.3 V, as they can be damaged by exceeding the gate breakdown voltage, necessitating complex voltage regulation circuitry to prevent damage, which complicates higher voltage analog circuit applications.
Innovation Solution
The implementation of an analog switch multiplexer system using PMOS and NMOS transistors with diodes and current sources, allowing the analog gate voltage to be transmitted up to the drain breakdown voltage, eliminating the need for voltage step-down circuitry by directing diodes and controlling transistor states with a digital control block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If analog switch circuits are used to handle analog signals, then signal switching function is achieved, but the circuits are damaged when analog signals exceed 3.3V gate breakdown voltage
Solution Approach 1:
The patent introduces an intermediary voltage regulation circuit between the analog signal source and the analog switch gate. This circuit includes a voltage divider network and clamping diodes that mediate the high-voltage analog signal, preventing it from exceeding the 3.3V gate breakdown voltage while still allowing the switch to control the signal effectively.
Solution Approach 2:
The patent implements protective clamping diodes and voltage regulation elements connected to the analog switch gate before the damaging high voltage can reach it. These elements provide beforehand cushioning by clamping the gate voltage to safe levels even when the analog signal exceeds 3.3V, preventing breakdown damage in advance.
2Reliability
If voltage regulation circuitry is added to protect analog switches from high voltage damage, then analog switch reliability is improved, but circuit complexity increases
Solution Approach 1:
The patent merges the voltage regulation function directly into the analog switch component structure. The clamping diodes and voltage regulation elements are integrated with the switch transistor, combining protection and switching functions into a single unified component rather than separate discrete circuits.
Solution Approach 2:
The analog switch component is designed with multi-functionality, serving both as a signal switching device and as a protected device against high voltage. The integrated clamping diodes and voltage regulation network provide universal protection across different operating conditions without requiring separate protection circuits for each application.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the analog switch multiplexer system to handle analog signals up to the drain breakdown voltage without damage, simplifying circuit design and eliminating the need for voltage regulation, thereby enhancing the reliability and efficiency of analog switching systems in higher voltage applications.
Implementation Method 1
a first PMOS transistor coupled with a first diode, the first diode directed inside; a second PMOS transistor coupled with a second diode, the second PMOS transistor and the second diode coupled in series with the first PMOS transistor and the first diode, the second diode directed inside
Implementation Method 2
While the first PMOS transistor and the second PMOS transistor are on, the method may include transmitting an analog gate voltage of a field effect transistor (FET) from a first pin to a second pin through a channel of the first PMOS transistor and a channel of the second PMOS transistor
Data Source
AI summary
A motor controller system that includes an analog switch multiplexer system is disclosed. Specific implementations include a plurality of field effect transistors (FETs) that may be configured to be operatively coupled with one or more phases of a motor. Each of the plurality of FETs may include a gate, an analog switch multiplexer coupled with each of the gates of the plurality of FETs and with an analog output, and a digital control block coupled with the analog switch multiplexer that may be configured to send a multiplexer select control signal to the analog switch multiplexer in response to receiving a serial peripheral interface signal.