Analog Transistor Undoped Channel Screen Layer
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Solution Overview
Problem
Existing analog transistors face challenges in maintaining quality and electrical characteristics at nanometer scales, particularly in mixed signal die, due to increased noise and threshold voltage variation, which affects the performance of amplifier circuits and systems on a chip (SoC).
Innovation Solution
The development of analog transistors with a substantially undoped channel and a highly doped screen layer, along with threshold voltage adjustment techniques such as epitaxial growth, atomic layer deposition, and haloless processing, to minimize dopant density and prevent dopant migration, resulting in reduced noise and improved electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If transistor channel length is reduced to nanometer scale, then transistor size is improved, but noise level and threshold voltage variation increase
Solution Approach 1:
The patent applies local quality by creating a highly doped screen layer at a specific depth below the channel (at the punch-through suppression region) while keeping the channel itself lightly doped. This localized doping approach allows the channel to maintain low noise and low threshold voltage variation, while the screen layer provides the necessary electrical control and stability at the nanometer scale.
Solution Approach 2:
The patent changes the doping parameter distribution vertically through the transistor structure. By implementing a graded doping profile with a lightly doped channel region and a highly doped screen layer at deeper positions, the patent optimizes both noise performance and electrical stability simultaneously, resolving the contradiction between size reduction and reliability maintenance.
2Manufacturing precision
If dopant density in channel is increased to control threshold voltage, then threshold voltage control is improved, but noise level increases
Solution Approach 1:
The patent segments the doping function into two distinct regions: a lightly doped channel region that minimizes noise, and a highly doped screen layer that provides threshold voltage control. This segmentation allows each region to optimize its specific function without compromising the other, resolving the contradiction between threshold voltage control and noise generation.
Solution Approach 2:
The patent moves the heavy doping from the horizontal channel region to a vertical dimension by placing the highly doped screen layer at a specific depth below the channel. This dimensional shift allows threshold voltage control to be achieved through vertical electric field effects from the screen layer, rather than through horizontal doping in the channel, thereby maintaining low noise while achieving precise threshold voltage control.
3Speed
If transistor dimensions are reduced for high bandwidth, then bandwidth is improved, but Vt mismatch between devices increases
Solution Approach 1:
The patent applies local quality by concentrating the heavy doping in a localized screen layer region rather than distributing it throughout the channel. This localized approach ensures that even as transistor dimensions are reduced, the screen layer maintains consistent electrical properties across devices, reducing Vt mismatch while preserving the small size needed for high bandwidth.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach leads to transistors with reduced noise, improved mobility, and decreased threshold voltage variation, enhancing the performance of amplifier circuits and SoC devices by controlling dopant fluctuations and maintaining transistor headroom, thus reducing the need for additional amplification or noise rejection circuitry.
Implementation Method 1
a gate having a gate dielectric and gate electrode positioned between a source and a drain
Implementation Method 2
Positioned below the substantially undoped channel is a screen layer doped to have an average dopant density at least twice as great as the average dopant density of the substantially undoped channel
Data Source
AI summary
An analog transistor useful for low noise applications or for electrical circuits benefiting from tight control of threshold voltages and electrical characteristics is described. The analog transistor includes a substantially undoped channel positioned under a gate dielectric between a source and a drain with the undoped channel not being subjected to contaminating threshold voltage implants or halo implants. The channel is supported on a screen layer doped to have an average dopant density at least five times as great as the average dopant density of the substantially undoped channel which, in turn, is supported by a doped well having an average dopant density at least twice the average dopant density of the substantially undoped channel.