Analogue Computing Circuit Timing Around Regulator Phase Transitions
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Solution Overview
Problem
Conventional digital processors for artificial neural networks (ANNs) face challenges in terms of computational latency and power consumption, especially in portable devices that require continuous processing for tasks like voice recognition, due to the need for sequential calculations and memory access, which can lead to undesirable latency and high power usage.
Innovation Solution
The implementation of computing circuitry that includes an analogue computation unit, a voltage regulator capable of cyclic phase transitions, and a controller that synchronizes data processing with the voltage regulator's phases to avoid phase transitions, allowing for efficient data processing with reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a digital processor based on Von Neumann architecture is used to perform ANN inference, then the computation can be implemented with standard digital circuits, but the computational latency increases and power consumption rises due to sequential calculations and frequent memory access
Solution Approach 1:
The patent replaces the digital Von Neumann architecture with an analogue computing system where neural network operations are performed using continuous physical signals. The analogue computation unit uses voltage or current signals to represent data and weights, enabling parallel matrix multiplications without sequential memory access, thus reducing computational latency while maintaining implementation feasibility through standard analogue circuit components
Solution Approach 2:
The patent transitions from discrete digital computation to continuous analogue computation, adding the dimension of continuous time and voltage/current values. This allows simultaneous representation and processing of multiple data points in parallel, fundamentally changing the computational paradigm from sequential to concurrent operations, thereby reducing latency
2Ease of manufacture
If a digital processor based on Von Neumann architecture is used to perform ANN inference, then the computation can be implemented with standard digital circuits, but the power consumption increases due to sequential calculations and memory access
Solution Approach 1:
The patent replaces energy-intensive digital switching operations with low-power analogue signal processing. By using continuous voltage or current signals to represent and process neural network data, the system eliminates the need for frequent digital-to-analogue and analogue-to-digital conversions, as well as reducing memory access operations, thereby significantly lowering power consumption while maintaining ease of implementation with standard analogue circuits
Solution Approach 2:
The patent implements continuous analogue computation where data processing occurs continuously in the analogue domain rather than through discrete digital steps. This continuous processing eliminates idle periods between memory accesses and computational steps, maintaining useful action throughout and reducing overall power consumption by keeping the system in a steady-state low-power operating mode
3Productivity
If the analogue computation unit processes data during voltage regulator phase transitions, then the processing can proceed without interruption, but the computational accuracy deteriorates due to voltage fluctuations
Solution Approach 1:
The patent implements a synchronization mechanism where the controller detects voltage regulator phase transitions in advance and temporarily suspends data processing during these transitions. By predicting when voltage fluctuations will occur and preemptively pausing computation, the system prevents accuracy degradation while resuming processing immediately after the transition, thus maintaining overall productivity with minimal interruption
Solution Approach 2:
The patent employs a feedback control system where the controller continuously monitors the voltage regulator's phase state and dynamically adjusts the data processing timing accordingly. The controller receives feedback about upcoming phase transitions and modulates the processing schedule to avoid these periods, creating a closed-loop system that adapts to voltage conditions and maintains computation accuracy without significant loss of productivity
Data Source
AI summary
This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.