Analyzing System Shift Time Command for Timing Accuracy

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Solution Overview

Problem

Conventional analyzing systems face challenges in synchronizing instruction timing between commanding and executing units, leading to inaccurate execution times and increased CPU load due to variable communication delays and system loads, particularly in processes like preparative separation and overlap injection data collection.

Innovation Solution

The system introduces a commanding unit that computes a shift time relative to a base-point time and sends this shift time with the processing command to the executing unit, allowing the processing to be executed at a designated relative time, either before or after the base-point time, thereby ensuring accurate execution timing and reducing CPU load.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If instructions are sent at the point in time of process execution, then the system responds quickly to actual conditions, but the execution timing becomes inaccurate due to variable communication delays and system load

Engineering Contradiction:
ImproveResponse speedVSAvoidExecution timing accuracy
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by computing the shift time in advance based on predetermined base-point times before actual execution. The commanding unit calculates the time offset between the base-point time and the actual execution time, then sends this pre-computed shift time with the instruction. This allows the executing unit to accurately determine execution timing despite variable communication delays, as the shift time accounts for these variations in advance.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple units cooperate with real-time instruction sending, then the system achieves high productivity, but the CPU load increases due to complex synchronization requirements

Engineering Contradiction:
ImproveSystem throughputVSAvoidCPU load
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent reduces CPU load by performing time synchronization calculations in advance. The commanding unit computes shift times based on predetermined base-point times before issuing instructions, rather than performing complex real-time synchronization calculations when instructions are sent. This preliminary computation simplifies the instruction transmission process and reduces the processing burden on the CPU during high-throughput operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9797915B2Analyzing system
Publication Date: 2017.10.24 SHIMADZU CORP
  • US9797915B2 patent drawing
  • US9797915B2 patent drawing
  • US9797915B2 patent drawing

AI summary

In an analyzing system including a commanding unit for sending a command and an executing unit for executing a processing upon receiving the command, a processing instruction may not be executed at the right time due to a heavy traffic of information and other factors. In order to solve this problem, in a preparative separation system 1 according to the present invention, a PC 20 provides the execution time for starting/finishing the fractionation processing to a controller 18. Therefore, even in the case where the time of the PC 20 and that of the controller 18 are not synchronized, the controller 18 can accurately set the execution time for starting/finishing the fractionation in a preparative separation unit 16. A piping 17 may be placed so that the traveling time of sample components is sufficiently larger than the delay time of signals due to the signal transfer lag and other reasons. This can absorb the delay time, allowing the units to cooperate with each other at a correct timing.