Angled Etch Diffusion Break Trenches for FinFET Isolation
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Solution Overview
Problem
Scaling of traditional field-effect transistors compromises depletion layer control, and increasing isolation trench depth in FinFET devices is challenging, especially for single and double diffusion breaks, due to etch profile issues.
Innovation Solution
An angled etch process, such as reactive ion etch, is used to form diffusion break trenches with a greater width at the bottom than at the top, improving isolation and facilitating gap-fill processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the isolation trench depth is increased to improve isolation in scaled FinFET devices, then isolation performance is improved, but the etch profile becomes wider at the top than at the bottom, creating challenges for subsequent gap-fill processes and reducing well isolation at single diffusion break layouts
Solution Approach 1:
The patent applies asymmetry by intentionally creating a non-uniform trench profile where the top width is greater than the bottom width through angled etching. This asymmetric profile resolves the contradiction by improving isolation performance while maintaining compatibility with gap-fill processes, as the wider top provides better isolation without creating the narrow-necked profile that would hinder manufacturing
Solution Approach 2:
The patent inverts the conventional etching approach by using angled etching to create a profile where the top is wider than the bottom, opposite to the traditional narrower-top profile. This inversion resolves the technical contradiction by achieving both improved isolation and manufacturability, as the wider top facilitates gap-fill processes while the angled sides maintain effective isolation depth
2Area of stationary object
If traditional FET designs are scaled to increase integration density, then area occupancy is reduced, but depletion layer control is compromised due to reduced gate voltage control at increasing distance from the gate electrode
Solution Approach 1:
The patent transitions from planar FET geometry to a three-dimensional FinFET structure with vertical fins. This dimensional change allows the gate to control the channel from multiple sides (top and two lateral sides), maintaining effective depletion layer control even as the device footprint is reduced. The vertical fin structure extends the gate control into the third dimension, solving the scaling problem
3Reliability
If the fin width is reduced below lithographic resolution to improve gate control, then depletion layer control is improved, but device fabrication complexity increases
Solution Approach 1:
The patent compensates for reduced fin width by utilizing the vertical dimension. The fin structure provides extended gate control through its height, allowing narrower fins to achieve adequate control without requiring proportionally smaller dimensions in all directions. This dimensional compensation maintains gate control effectiveness while staying within lithographic capabilities
Solution Approach 2:
The patent employs a nested structure where the gate electrode wraps around the fin in a multi-sided configuration. This nested arrangement maximizes the gate-to-channel interface area, providing enhanced control for narrow fins without requiring the fin width to be reduced below manufacturable limits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances isolation and trench profile, resulting in better control of the depletion layer and a more gap-fill friendly design with shallower trench depths compared to conventional methods.
Implementation Method 1
performing an angled etch disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate
Data Source
AI summary
Methods for forming semiconductor devices herein may include forming a trench in a substrate layer, wherein a hardmask is disposed atop the substrate layer, and implanting the trench at an angle relative to a top surface of the hardmask. The method may further include forming an oxide layer within the trench, wherein a thickness of the oxide layer along a bottom portion of the trench is greater than a thickness of the oxide layer along an upper portion of the trench.