Angled Conductive Gate Stitching for IC Layout Resolution Limits

Solution Overview

Problem

Existing integrated circuit (IC) fabrication processes that aim for finer spatial resolution often incur higher costs and longer processing times, making it economically infeasible to have every layer of features fabricated with the same resolution.

Innovation Solution

A method is introduced to merge gate electrode cutting layout patterns that violate spatial resolution requirements by adding a stitching layout pattern to reconnect interrupted electrical connections, and a remedial connecting layout pattern to a conductive layer, ensuring compliance with spatial resolution demands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If finer spatial resolution fabrication processes are used, then manufacturing precision is improved, but cost increases and productivity decreases

Engineering Contradiction:

Improvespatial resolutionVSAvoidfabrication throughput

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The fabrication process is divided into two segments: critical layers requiring fine spatial resolution are fabricated with high precision processes, while non-critical layers are fabricated with faster, lower-resolution processes. This segmentation allows the circuit to achieve necessary precision in key areas without applying expensive slow processes to all layers, thereby maintaining productivity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different quality levels of fabrication are applied to different regions of the circuit based on their functional requirements. Critical circuits receive fine-resolution fabrication while non-critical circuits use coarser, faster processes. This local differentiation optimizes the balance between manufacturing precision and productivity by allocating resources according to actual needs.

Inventive Principle:

Principle #3Local quality

2Manufacturing precision

If finer spatial resolution fabrication processes are used, then manufacturing precision is improved, but cost increases

Engineering Contradiction:

Improvespatial resolutionVSAvoidfabrication cost

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The fabrication process is divided into two segments: critical layers requiring fine spatial resolution are fabricated with high precision processes, while non-critical layers are fabricated with faster, lower-resolution processes. This segmentation allows the circuit to achieve necessary precision in key areas without applying expensive slow processes to all layers, thereby maintaining productivity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different quality levels of fabrication are applied to different regions of the circuit based on their functional requirements. Critical circuits receive fine-resolution fabrication while non-critical circuits use coarser, faster processes. This local differentiation optimizes the balance between manufacturing precision and productivity by allocating resources according to actual needs.

Inventive Principle:

Principle #3Local quality

3Area of stationary object

If layout patterns are merged to improve density, then area utilization is improved, but spatial resolution compliance deteriorates

Engineering Contradiction:

Improvelayout densityVSAvoidspatial resolution compliance

Core Design Contradiction:

Area of stationary objectVSManufacturing precision

Solution Approach 1:

The layout is segmented into critical and non-critical regions. In non-critical regions, layout patterns can be merged to improve density. In critical regions, patterns maintain spacing to ensure spatial resolution compliance. This segmentation allows the design to achieve high density where possible while maintaining manufacturing compliance where necessary.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different layout density requirements are applied to different regions based on their criticality. Non-critical areas use dense merged patterns while critical areas use spaced-out patterns that comply with spatial resolution limits. This local quality approach allows the overall design to achieve better area utilization without sacrificing manufacturing feasibility in critical paths.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS20250324765A1Integrated circuit having angled conductive feature

Publication Date: 2025.10.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method of making an integrated circuit includes forming a first gate electrode structure extending in a first direction. The method further includes forming a second gate electrode structure extending in the first direction and separated in a second direction from the first gate electrode structure. The method further includes forming a conductive feature, wherein the conductive feature includes: a first section electrically connected to the second portion, a second section electrically connected to the second gate structure, and a third section electrically connecting the first section and the second section, wherein the third section extends in a third direction angled with respect to both the first direction and the second direction. The method further includes forming a third gate electrode structure extending in the first direction, wherein the third gate electrode structure is spaced from the first gate electrode structure in the first direction.