Angled Ion Implantation for Semiconductor Etch Roughness
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current techniques for patterning semiconductor devices face limitations in reducing line edge roughness (LER) and line width roughness (LWR) during the etching process, as conventional etch methods have a limited ability to improve these parameters.
Innovation Solution
The use of angled ion implantation to treat sidewall surfaces of patterning features, combined with plasma etch processes, to enhance etch selectivity and prevent the formation of nano-scale hard masks in organic and inorganic materials, thereby improving LER and LWR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etch methods are used, then the etching process can be performed, but the line edge roughness (LER) and line width roughness (LWR) cannot be sufficiently reduced
Solution Approach 1:
Ion implantation is performed as a preliminary treatment before etching to modify the sidewall surfaces of patterning features. This pre-treatment creates a modified layer that reduces LER/LWR during the subsequent etch process, allowing the etch to proceed with improved precision without sacrificing selectivity
Solution Approach 2:
The physical and chemical properties of the patterning feature sidewalls are changed through ion implantation. The implantation modifies the material properties (such as cross-linking, density, or composition) of the sidewall region, creating a treated layer that etches more uniformly and reduces roughness while maintaining the etch process's selectivity
2Manufacturing precision
If ion implantation is performed to reduce LER/LWR, then manufacturing precision improves, but the process complexity increases
Solution Approach 1:
The ion implantation process serves multiple functions simultaneously: it modifies the sidewall surfaces to reduce LER/LWR, prevents nano-scale hard mask formation, and maintains etch selectivity. By combining these functions into a single treatment step, the process complexity increase is minimized while achieving multiple benefits
3Manufacturing precision
If etch process is intensified to improve LER reduction, then line edge roughness decreases, but nano-scale hard masks form in organic and inorganic materials
Solution Approach 1:
Ion implantation is applied in advance to prevent the formation of nano-scale hard masks during etching. The implanted ions modify the material properties of the patterning features and underlying layers, making them more resistant to the hard mask formation mechanism that would otherwise occur during intensified etching processes
Solution Approach 2:
The ion implantation process converts potentially harmful effects into beneficial ones. The same ion bombardment that could damage materials is controlled to create a modified layer that actually protects against hard mask formation while simultaneously reducing LER/LWR, turning a potential harm into a dual benefit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes photoresist roughness and reduces etch-induced line edge roughness, while improving etch selectivity and maintaining acceptable sidewall profiles, especially for features with critical dimensions of 100 nm or less.
Implementation Method 1
implanting ions into a sidewall surface of the set of patterning features, wherein the ions are implanted at an angle nonparallel with the sidewall surface
Implementation Method 2
etching the semiconductor device after the ions are implanted into the sidewall surface
Data Source
AI summary
Provided herein are approaches for patterning a semiconductor device. In an exemplary approach, a method includes providing a set of patterning features atop a layer of a semiconductor device, and implanting ions into a sidewall surface of the set of patterning features. The method includes implanting ions at an angle nonparallel with the sidewall surface, for example, approximately 60° to a plane normal to the sidewall surface. The method further includes etching the semiconductor device after the ions are implanted into the sidewall surface. As a result, by using an angled ion implantation as a pretreatment prior to etching, photoresist roughness is minimized, and sidewall striation and etch-induced line edge roughness is reduced. Approaches herein may also improve etch selectivity with respect to underlying layers disposed under the photoresist, as well as improved photoresist profiles.