Angled Power Rail Lead Layout for Dense Semiconductor Interconnects
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Solution Overview
Problem
Existing integrated circuits face challenges in maintaining computing power density while preventing electrical shorts between interconnects, often resulting in insufficient power connections due to spacing requirements and reduced contact areas.
Innovation Solution
A semiconductor structure design featuring laterally extending interconnects separated by an insulating member, with angled leads and source/drain configurations that allow for electrical insulation and increased contact areas, preventing shorts and enhancing power distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interconnects are spaced apart to prevent electrical short circuits, then electrical reliability is improved, but computing power density decreases
Solution Approach 1:
The patent transitions from planar spacing to three-dimensional vertical separation by routing first and second interconnects on opposite sides of the insulating member, allowing interconnects to be positioned closer in the lateral plane while maintaining electrical isolation through the vertical dimension
Solution Approach 2:
The insulating member acts as an intermediary structure that provides electrical isolation between interconnects, enabling them to be positioned in close proximity without direct contact, thus resolving the conflict between spacing requirements and density goals
2Productivity
If interconnect size is reduced to increase computing power density, then computing power density is improved, but contact area between power rail and FETs decreases
Solution Approach 1:
The patent utilizes vertical stacking to increase contact area without lateral expansion, with source/drain structures extending through the insulating member to contact interconnects on opposite sides, effectively adding a vertical dimension to the contact interface
Solution Approach 2:
The insulating member is constructed as a composite structure containing multiple insulators that provide both electrical isolation and structural support for the source/drain configurations, enabling enhanced contact area while maintaining isolation
3Ease of manufacture
If manufacturing tolerances vary, then manufacturing flexibility is improved, but power connection reliability deteriorates
Solution Approach 1:
The patent incorporates redundant source/drain structures and extended leads that provide tolerance compensation, ensuring reliable power connections even when manufacturing variations occur in the positioning of interconnects or active structures
Data Source
AI summary
A semiconductor structure extends laterally with a first interconnect on one side and a second interconnect on an opposing side separated from the first interconnect by a longitudinal thickness of an insulating member that extends laterally along the first interconnect and the second interconnect. The semiconductor structure includes a first source/drain (S/D) positioned in the insulating member between the first interconnect and the second interconnect, a second S/D positioned in the insulating member adjacent to the first S/D, and a first lead electrically connected to the first S/D and to the second interconnect and electrically insulated from the second S/D. A first lateral end of the first lead is angled inwards towards the first S/D at a first acute angle, and a second lateral end of the first lead is angled away from the first S/D at a second acute angle.