Angled Substrate Chip Package for High-Count Stacks
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Solution Overview
Problem
Existing stacked semiconductor chip packages face challenges in positioning high-bandwidth ramp components, leading to reduced yield and increased cost due to difficulties in fabricating the chip package.
Innovation Solution
A chip package design featuring a substrate with angled sides and through-substrate vias (TSVs) that electrically couple pads on the surface and side, allowing for a stacked arrangement of semiconductor dies with offset configuration, eliminating the need for a planar ramp component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-bandwidth ramp component is positioned parallel to the terrace to electrically couple exposed pads, then high inter-component communication bandwidth is achieved, but the difficulty of positioning and fabricating the chip package increases
Solution Approach 1:
The patent removes the complex parallel ramp component from the design. Instead of positioning a ramp component parallel to the terrace, the invention uses the substrate's angled side itself to provide the electrical coupling path, extracting the unnecessary intermediate component and simplifying the manufacturing process while maintaining high-bandwidth capability
Solution Approach 2:
The patent transitions from a planar ramp component configuration to a three-dimensional angled side configuration. By positioning the electrical coupling path in the vertical dimension through the angled side rather than in the horizontal plane, the design achieves high-bandwidth communication while eliminating positioning difficulties associated with planar ramp components
2Strength
If the side of the substrate is positioned at an angle between parallel and perpendicular to the first surface, then mechanical stability is enhanced and risk of mechanical damage is reduced, but the complexity of defining the angled side increases
Solution Approach 1:
The patent introduces asymmetry by positioning the side of the substrate at an angle between parallel and perpendicular to the first surface. This asymmetric configuration enhances mechanical stability and reduces stress concentration compared to symmetric vertical or horizontal orientations, while the angle can be defined using standard machining or etching processes
Solution Approach 2:
The patent changes the geometric parameter of the substrate side from a standard vertical or horizontal orientation to an intermediate angle. This parameter change optimizes mechanical properties by distributing stresses more favorably, and the specific angle can be selected based on manufacturing capabilities and performance requirements
Data Source
AI summary
A chip package is described. This chip package includes a substrate having a side at an angle relative to the top and bottom surfaces of the substrate that is between that of a direction parallel to the top and bottom surfaces and that of a direction perpendicular to the top and bottom surfaces (i.e., between 0° and 90°). This side may be configured to couple to a stack of semiconductor dies in which the semiconductor dies are offset from each other in a direction parallel to the top and bottom surfaces so that one side of the stack defines a stepped terrace. For example, the side may include electrical pads. These electrical pads may be coupled to electrical pads on the top surface by through-substrate vias (TSVs) in the substrate. Moreover, the electrical pads on the top surface may be configured to couple to an integrated circuit.