Angled Via for Semiconductor Tip-to-Tip Margin Improvement

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Solution Overview

Problem

In semiconductor device manufacturing, the close tip-to-tip distance between contacts in tight-pitched structures leads to signal shorting issues, which are difficult to address through reducing contact size due to the need for wide contacts to fully cover devices, and misalignment problems.

Innovation Solution

The implementation of angled vias that electrically connect lower and upper devices, featuring an angled surface relative to the vertical axis, increases the separation distance between contacts while ensuring full contact with the lower device, thereby reducing shorting risks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the tip-to-tip distance between contacts is reduced to increase device density, then device integration is improved, but signal shorting risk increases

Engineering Contradiction:
Improvedevice densityVSAvoidsignal shorting risk
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from a conventional vertical via structure to an angled via structure that extends laterally between upper devices. This dimensional change allows the via to connect to the lower device while maintaining increased separation from adjacent contacts, thus reducing shorting risk while preserving device density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The via structure employs asymmetric geometry where the via is angled rather than vertically aligned. This asymmetric configuration enables the via to connect to the lower device at an offset position, increasing the lateral separation distance from neighboring contacts and thereby reducing signal shorting risk without compromising electrical connection integrity.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If contact size is reduced to increase separation distance, then shorting risk is reduced, but contact coverage of lower device deteriorates

Engineering Contradiction:
Improveshorting riskVSAvoidcontact coverage
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of reducing contact dimensions, the patent introduces a lateral component to the via structure. This dimensional change allows the via to achieve increased separation from adjacent contacts while maintaining full coverage of the lower device contact area, thus resolving the trade-off between separation distance and contact coverage.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If vertical alignment is used for via formation, then manufacturing simplicity is maintained, but separation distance between contacts is insufficient

Engineering Contradiction:
Improvevia formation simplicityVSAvoidseparation distance
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent employs asymmetric via formation where the via is angled relative to the vertical axis. This asymmetric approach increases the lateral separation distance between contacts while maintaining a relatively simple manufacturing process that can be integrated into existing via formation techniques, thus balancing manufacturing ease with improved separation.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS20230187510A1Angled via for tip to tip margin improvement
Publication Date: 2023.06.15 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20230187510A1 patent drawing
  • US20230187510A1 patent drawing
  • US20230187510A1 patent drawing

AI summary

Embodiments disclosed herein include a semiconductor structure having a first lower device and a second lower device laterally adjacent to the first lower device at a lower level of the semiconductor structure, a first upper device and a second upper device laterally adjacent to the first upper device at an upper level of the semiconductor structure. The upper level may be vertically above the lower level. The semiconductor structure may also include an angled via electrically connecting the lower device and the first upper device. The angled via may include an angled surface laterally between the first upper device and the second upper device that is angled toward the first upper device relative to a vertical axis.