Angular-Indent Transistor Channel for Lower Source-Drain Resistance
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Solution Overview
Problem
Conventional semiconductor devices with gate all-around transistors (GAA) suffer from increased resistance due to the presence of a channel extension region between the cladded channel and the source/drain region, which hinders efficient current flow.
Innovation Solution
The introduction of angular indents in the channel directly contacting the source/drain region, eliminating the need for a traditional channel extension region, thereby reducing resistance and enhancing interfacial area for improved conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a channel extension region is present between the cladded channel and source/drain region, then the channel is properly formed, but resistance between the source/drain region and cladded channel increases
Solution Approach 1:
The patent removes the channel extension region entirely, allowing the cladded channel to directly contact the source/drain region. This extraction of the problematic intermediate region eliminates the resistance issue while maintaining proper device function through alternative structural design.
Solution Approach 2:
The patent introduces angular indents that extend laterally into the source/drain region, creating a multi-dimensional contact interface. This dimensional change from a simple linear interface to an angular, multi-faceted interface increases contact area and reduces resistance without adding vertical complexity.
2Reliability
If angular indents are introduced in the channel, then resistance is reduced and interfacial area is increased, but manufacturing complexity increases
Solution Approach 1:
The angular indents are formed during the channel formation process itself, before source/drain region formation. This preliminary shaping of the channel allows subsequent source/drain material to naturally conform to the angular geometry, simplifying the overall manufacturing sequence despite the complex final structure.
Solution Approach 2:
The patent modifies the channel geometry by introducing angular indents with specific orientation angles and dimensions. These parameter changes are optimized to provide sufficient contact area for low resistance while remaining compatible with standard fabrication process capabilities.
3Reliability
If the channel directly contacts the source/drain region, then resistance is reduced, but strain application effectiveness may be compromised
Solution Approach 1:
The angular indents create a multi-faceted contact interface that extends laterally into the source/drain region. This dimensional change provides both increased contact area for low resistance and sufficient material overlap for effective strain transfer from the source/drain region to the channel.
Solution Approach 2:
The structure creates a composite interface region where the channel material and source/drain material interpenetrate through the angular indents. This composite structure allows simultaneous optimization of electrical contact (through increased interface area) and mechanical strain transfer (through interdigitated geometry).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The angular indents in the channel structure reduce resistance and increase the effectiveness of strain application, leading to faster switching performance and reduced leakage current in semiconductor devices.
Implementation Method 1
The existence of this channel extension region undesirably adds resistance between the S/D region and the cladded channel
Data Source
AI summary
A transistor includes a channel that has sidewall that consists of an angular indent that is directly connected to the source/drain region without a channel extension region therebetween. For example, the transistor may be a p-type transistor in which the channel may be composed of silicon germanium (SiGe) and may be directly connected to a p-type source/drain region. Unlike some traditional pFETs, there is not a traditional channel extension region (e.g., a Si channel extension region) between the SiGe channel and the p-type source/drain regions. As such, the resistance between the channel and the source/drain is relatively reduced.