ANN Cluster Interlayer Safety Using Redundant Error Checks
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Solution Overview
Problem
Artificial neural networks (ANNs) face challenges in ensuring functional safety, particularly in critical applications like autonomous vehicles, due to their complexity and susceptibility to random errors and adversarial strategies, which existing solutions do not fully address.
Innovation Solution
The development of a neural network processor that incorporates multiple safety mechanisms, including data stream fault detection, software-defined redundant allocation, cluster interlayer safety, and weights safety mechanisms, to provide error detection and correction capabilities tightly coupled with the processor architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple safety mechanisms are incorporated into the neural network processor, then reliability is improved, but device complexity increases
Solution Approach 1:
The processor is divided into multiple clusters, each with its own safety mechanisms. The system segments safety functions into: (1) data stream fault detection at cluster input, (2) weights safety verification, (3) intermediate results monitoring, and (4) output validation. This segmentation allows independent verification of each safety layer without requiring complete system redesign.
Solution Approach 2:
Safety checks are performed in advance before critical operations. The system implements: (1) pre-verification of input data streams for faults, (2) pre-validation of weights before computation, and (3) pre-monitoring of intermediate results. This preliminary action prevents error propagation through the network.
2Reliability
If error detection and correction capabilities are added, then reliability is improved, but use of energy increases
Solution Approach 1:
The system uses lightweight checksum verification instead of comprehensive error correction codes. Simple parity bits and basic checksums are computed and verified, providing adequate error detection without the computational overhead of sophisticated correction mechanisms. This approach detects errors efficiently with minimal energy expenditure.
Solution Approach 2:
The processor performs self-verification of its own operations through automated safety checks. Intermediate results are automatically monitored and compared against expected ranges, and input data is self-validated before processing. This self-service approach eliminates the need for external verification systems that would consume additional energy.
3Reliability
If safety mechanisms are tightly coupled with processor architecture, then reliability is improved, but device complexity increases
Solution Approach 1:
Safety mechanisms are merged with existing processor components rather than added as separate external systems. The safety logic is integrated into: (1) the cluster interconnect fabric for data stream verification, (2) the weight memory interface for weights validation, and (3) the computation units for intermediate results monitoring. This merging provides safety functionality while utilizing existing architectural resources.
Solution Approach 2:
Existing processor components are designed to serve multiple functions: the cluster interconnect fabric handles both data transmission and safety verification, the memory interface performs both weight loading and weights validation, and the computation units execute both processing operations and self-monitoring. This multi-functionality reduces overall system complexity while maintaining comprehensive safety coverage.
Data Source
AI summary
Novel and useful system and methods of functional safety mechanisms for use in an artificial neural network (ANN) processor. The mechanisms can be deployed individually or in combination to provide a desired level of safety in neural networks. Multiple strategies are applied involving redundancy by design, redundancy through spatial mapping as well as self-tuning procedures that modify static (weights) and monitor dynamic (activations) behavior. The NN processor incorporates functional safety concepts which reduce its risk of failure that occurs during operation from going unnoticed. The mechanisms function to detect and promptly flag and report the occurrence of an error with some mechanisms capable of correction as well. The safety mechanisms cover data stream fault detection, software defined redundant allocation, cluster interlayer safety, cluster intralayer safety, layer control unit (LCU) instruction addressing, weights storage safety, and neural network intermediate results storage safety.