ANN Weight Mapping to Analog Conductances

The patent applies preliminary action by performing hardware-aware optimization before deploying the neural network to analog memory. The method pre-computes optimized weight mappings that account for device non-idealities (programming errors, read noise, conductance drift) before the actual inference operations. This advance preparation ensures that even though the analog devices have inherent errors, the pre-optimized weight assignments compensate for these errors, maintaining inference accuracy while benefiting from the energy efficiency of analog computation.

The patent applies parameter changes by transforming the weight mapping parameters from simple direct mappings to optimized mappings that incorporate hardware-specific parameters. Instead of using a straightforward linear mapping from software weights to analog conductances, the method introduces optimization parameters (scaling factors, offset values, and mapping strategies) that are tailored to the specific characteristics of the target analog memory device. This transforms the simple mapping into a parameterized mapping that can adapt to device non-idealities while maintaining relative implementation simplicity.

The patent resolves this contradiction by performing the computationally intensive hardware-aware optimization in advance, before the neural network is deployed for inference. The weight preparation and optimization process, which involves applying hardware models and minimizing error metrics, is completed during a pre-processing phase. Once the optimized weight mappings are computed and stored, the actual inference operations can proceed quickly without needing to re-compute optimizations. This shifts the time cost from the inference phase to the deployment phase, making the trade-off acceptable.

The patent applies preliminary anti-action by pre-compensating for conductance drift and variability in the weight mapping process. The hardware-aware optimization method incorporates models of conductance drift and variability, and the optimized weight assignments are specifically designed to counteract these expected degradations. By anticipating and compensating for the drift in advance, the system maintains inference accuracy over time even though the analog conductances themselves are unstable. This preliminary counter-action allows the system to exploit the speed benefits of analog memory while mitigating the long-term stability issues.