Annealing Electroplated Copper Pads to Reduce Interfacial Voids
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In wafer level packaging, interfacial voids form between copper-containing structures and solder interfaces, leading to mechanical and electrical reliability issues due to the formation of Kirkendall voids, which degrade the quality of the solder joint over time.
Innovation Solution
Thermal treatment of electroplated copper pads to remove impurities and form vacancies on the surface, followed by annealing at temperatures between 100° C. and 400° C., to improve the interface resistance to interfacial voiding, using an electroplating solution with additives like accelerators, suppressors, and levelers, and forming a solder interface without nickel, cobalt, or gold layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If electrodeposited copper pads are used in wafer level packaging, then manufacturing efficiency and cost are improved, but interfacial voiding occurs at the copper-solder interface leading to degraded reliability
Solution Approach 1:
The patent applies preliminary thermal treatment to the electrodeposited copper pads before soldering to remove impurities and form vacancies on the surface. This preliminary action prevents the formation of Kirkendall voids during subsequent soldering, thereby maintaining both manufacturing efficiency and improving solder joint reliability by eliminating the root cause of interfacial voiding.
Solution Approach 2:
The patent changes the thermal parameters by annealing the copper pads at specific temperatures (between 100°C and 400°C) for controlled durations. This parameter change modifies the copper pad surface properties, removing impurities and creating vacancies that prevent harmful interfacial void formation, thus resolving the reliability issue while maintaining the benefits of electrodeposition.
2Manufacturing precision
If thermal treatment is applied to remove impurities from electrodeposited copper, then interface quality is improved, but additional process steps and time are required
Solution Approach 1:
The patent optimizes thermal treatment parameters by annealing at temperatures between 100°C and 400°C for controlled time periods. This parameter optimization achieves effective impurity removal and vacancy formation on copper surfaces while minimizing the duration of the thermal treatment step, thus improving interface quality without excessive time penalty.
Solution Approach 2:
The patent combines the thermal treatment step with existing process steps in the wafer level packaging flow, merging the impurity removal function with other necessary processing operations. This integration reduces the total process time by eliminating separate dedicated thermal treatment steps while still achieving the required interface quality improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly reduces interfacial voiding, enhancing the mechanical and electrical reliability of the solder joint by improving the interface integrity between the copper pad and solder, as demonstrated by reduced void density and impurity concentration.
Implementation Method 1
electrodepositing a copper containing structure on a substrate
Implementation Method 2
annealing the copper containing structure
Implementation Method 3
removal of impurities from electroplated copper
Implementation Method 4
thermally treating electroplated copper containing the pad to promote (1) removal of impurities from electroplated copper, and (2) optionally form voids or nucleate vacancies on the surface of the copper
Implementation Method 5
forming an interface between the copper pad with the solder material
Data Source
AI summary
A method of treating a copper containing structure on a substrate is disclosed. The method includes electrodepositing the copper containing structure on a substrate, annealing the copper containing structure, and forming an interface between a pad of the copper containing structure and a solder structure after anneal. The interface can have improved resistance to interfacial voiding. The copper containing structure is configured to deliver current between one or more ports and one or more solder structures in the integrated circuit package. Annealing the copper containing structure can move impurities and vacancies to the surface of the copper containing structure for subsequent removal.