Annealed Seed Layer for Orthorhombic FeRAM Switching
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Solution Overview
Problem
Existing ferroelectric random-access memory (FeRAM) technologies face challenges in achieving reliable and fast switching speeds due to insufficient orthorhombic phase content in the memory layer's crystal structure, which affects the ferroelectric properties and overall performance.
Innovation Solution
Incorporating an annealed seed layer with a higher orthorhombic phase content, formed through processes like in-situ annealing or rapid thermal annealing, to enhance the crystal structure of the memory layer, thereby improving the ferroelectric properties and switching speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory layer formation processes are used, then manufacturing simplicity is maintained, but orthorhombic phase content is insufficient, leading to poor ferroelectric properties
Solution Approach 1:
An annealed seed layer is formed prior to the memory layer to pre-establish the desired orthorhombic crystal structure. This preliminary action provides a template that guides the subsequent memory layer formation, ensuring high orthorhombic phase content without requiring complex post-processing steps.
Solution Approach 2:
The seed layer undergoes thermal annealing treatment that changes its crystal structure parameters, specifically increasing the orthorhombic phase content. This parameter change in the seed layer then influences the crystal structure development of the memory layer, improving ferroelectric properties through controlled structural transformation.
2Reliability
If higher orthorhombic phase content is achieved through annealing, then ferroelectric properties improve, but manufacturing process complexity increases
Solution Approach 1:
The annealing process is performed on the seed layer before memory layer deposition, preparing the crystal template in advance. This preliminary action ensures that when the memory layer is formed, it naturally develops the desired orthorhombic structure, achieving fast switching speeds without requiring complex post-deposition annealing steps.
Solution Approach 2:
The annealed seed layer acts as an intermediary between the substrate and the memory layer, mediating the crystal structure formation. By pre-annealing the seed layer, it serves as a structured intermediary that guides the memory layer's crystal growth, simplifying the overall manufacturing process while ensuring high orthorhombic phase content.
3Reliability
If an annealed seed layer is introduced, then orthorhombic phase content and ferroelectric properties are enhanced, but device structure complexity increases
Solution Approach 1:
The seed layer is prepared and annealed in advance before memory layer deposition. This preliminary preparation establishes the orthorhombic crystal template that directs the memory layer's structure, achieving enhanced ferroelectric properties while maintaining a relatively simple overall device architecture through sequential processing.
Solution Approach 2:
The annealing treatment is applied specifically to the seed layer region, creating local orthorhombic phase enrichment at the critical interface. This localized quality enhancement ensures that the memory layer forms with high orthorhombic content where it matters most, without requiring the entire device structure to be complex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The annealed seed layer increases the orthorhombic phase content in the memory layer, leading to enhanced ferroelectric properties and faster switching speeds, thereby improving the reliability and performance of FeRAM devices.
Implementation Method 1
Incorporating an annealed seed layer with a higher orthorhombic phase content, formed through processes like in-situ annealing or rapid thermal annealing
Data Source
AI summary
In some embodiments, the present disclosure relates to an integrated chip that includes a first conductive structure arranged over a substrate. A memory layer is arranged over the first conductive structure, below a second conductive structure, and includes a ferroelectric material. An annealed seed layer is arranged between the first and second conductive structures and directly on a first side of the memory layer. An amount of the crystal structure that includes an orthorhombic phase is greater than about 35 percent.