Annealed Seed Layer for Faster Ferroelectric Memory Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current ferroelectric random-access memory (FeRAM) technologies face challenges in achieving reliable and fast switching speeds due to insufficient orthorhombic phase content in the crystal structure of memory layers, which affects their ferroelectric properties and data storage capabilities.
Innovation Solution
An annealing process is applied to the seed layer to increase the orthorhombic phase content, resulting in a higher instance of this phase in the memory layer formed over the annealed seed layer, thereby enhancing the ferroelectric properties and switching speeds of the FeRAM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an annealing process is applied to the seed layer to increase orthorhombic phase content, then ferroelectric properties and switching speeds improve, but manufacturing process complexity increases
Solution Approach 1:
The annealing process is performed on the seed layer before depositing the memory layer, preparing the crystal structure in advance to promote orthorhombic phase formation. This preliminary action ensures that the underlying layer is optimized for ferroelectric properties before the memory layer is formed, resolving the contradiction by embedding the complexity resolution in the fabrication sequence.
Solution Approach 2:
The patent applies thermal annealing at specific temperature ranges to transform the crystal structure of the seed layer, increasing orthorhombic phase content. By controlling thermal parameters during annealing, the ferroelectric properties are enhanced without requiring fundamental changes to the device architecture, thus improving reliability while managing manufacturing complexity.
2Productivity
If the orthorhombic phase content in the memory layer is increased, then switching speeds improve, but the manufacturing precision requirements increase
Solution Approach 1:
The seed layer is annealed beforehand to establish a crystal structure that promotes orthorhombic phase formation in the subsequent memory layer. This preliminary preparation reduces the precision requirements during memory layer deposition, as the favorable crystal orientation is already established in the underlying layer.
Solution Approach 2:
The annealing process creates localized crystal structure optimization in the seed layer, establishing regions with high orthorhombic phase content that serve as templates for the memory layer. This local quality enhancement ensures fast switching speeds in critical areas without requiring uniform high precision across the entire manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased orthorhombic phase content in the memory layer improves the reliability and performance of FeRAM by enabling more efficient data storage and retrieval, as the memory layer exhibits improved ferroelectric properties and faster switching speeds.
Implementation Method 1
An annealing process is applied to the seed layer to increase the orthorhombic phase content
Data Source
AI summary
In some embodiments, the present disclosure relates to an integrated chip that includes a first conductive structure arranged over a substrate. A memory layer is arranged over the first conductive structure, below a second conductive structure, and includes a ferroelectric material. An annealed seed layer is arranged between the first and second conductive structures and directly on a first side of the memory layer. An amount of the crystal structure that includes an orthorhombic phase is greater than about 35 percent.


