3D Memory Annular Blocking Dielectrics Charge Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming discrete charge storage elements and annular blocking dielectrics, which affect the storage capacity and isolation between memory cells, leading to issues like charge migration and reduced memory cell separation.
Innovation Solution
A three-dimensional memory device is designed with an alternating stack of insulating and conductive layers over a substrate, featuring memory stack structures with tunneling dielectric layers and discrete annular charge storage structures, including annular dielectric metal oxide structures, formed through specific etching and deposition processes to create nested annular structures at each level of the conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form charge storage elements and blocking dielectrics, then the manufacturing process is simpler, but charge migration occurs and memory cell separation is reduced
Solution Approach 1:
The patent implements nested annular structures where the tunneling dielectric layer is positioned inside the charge storage layer, which is in turn surrounded by the blocking dielectric layer. This nested configuration creates discrete, well-separated memory cells that prevent charge migration while maintaining a compact vertical architecture. Each memory cell consists of concentric cylindrical layers nested around a central channel, achieving both isolation and space efficiency.
Solution Approach 2:
The patent divides the continuous dielectric structures into discrete segmented layers: a tunneling dielectric layer, a charge storage layer, and a blocking dielectric layer. These segmented annular structures are formed at specific intervals along the vertical channel, creating isolated memory cells that prevent charge leakage between cells while maintaining manufacturing feasibility through layer-by-layer fabrication.
2Manufacturing precision
If discrete annular structures are formed with multiple layers, then storage capacity and isolation improve, but the manufacturing process becomes more complex
Solution Approach 1:
The patent forms the alternating stack of insulating and conductive layers before creating the memory stack structures. This preliminary formation of the layered stack provides a pre-configured template that guides subsequent processing steps. The sacrificial layers are pre-positioned to define the eventual locations of the annular structures, enabling precise formation of multiple dielectric layers without requiring complex alignment procedures during the actual structure formation.
Solution Approach 2:
The patent uses sacrificial material layers as intermediary elements during fabrication. These sacrificial layers are deposited between the insulating and conductive layers, serving as temporary placeholders that define the geometry of the future annular structures. During processing, the sacrificial layers are selectively removed to create spaces that are subsequently filled with the tunneling dielectric, charge storage, and blocking dielectric materials, enabling precise formation of nested annular structures through a simplified sequential process.
3Reliability
If annular blocking dielectrics are implemented, then charge migration is reduced, but device complexity increases
Solution Approach 1:
The patent implements different dielectric materials with specific properties at different radial positions within the memory cell structure. The tunneling dielectric layer has properties optimized for charge injection, the charge storage layer is positioned to capture and retain charge, and the blocking dielectric layer has properties optimized for preventing charge migration. Each annular layer has locally optimized material properties that address specific functional requirements, achieving superior charge isolation while maintaining a manageable structural complexity through functional specialization of each layer.
Data Source
AI summary
A memory opening is formed through an alternating stack of sacrificial material layers and electrically conductive layers located over a substrate. Discrete annular dielectric metal oxide structures are formed on sidewalls of the electrically conductive layers around the memory opening. After forming memory stack structures including the annular dielectric metal oxide structures in the memory opening, lateral recesses are formed by removing the sacrificial material layers selective to the electrically conductive layers. Sacrificial material layers in the memory stack structure are etched at levels of the lateral recesses to form discrete annular structures at each level of the electrically conductive layers, each of which includes, from inside to outside, a respective annular charge storage structure, and a respective blocking dielectric comprising an annular dielectric metal oxide structure.