Annular Capacitor RF Systems via Planarized Via Proximity
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Solution Overview
Problem
The hardness differential between substrates and metal structures in RF, microwave, and millimeter wave applications leads to uneven planarization, resulting in parasitic inductance and performance issues due to random thickness variations across devices transitioning from substrates to metal structures.
Innovation Solution
A method is developed to create a substrate with an annular capacitor structure where passive devices are constructed in close proximity to metalized vias or buried structures, eliminating the need for a ground plane and minimizing inductive parasitic noise by using a process that includes forming a through-via hole, depositing copper, and applying dielectric layers to maintain a planarized surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If passive devices are placed close to vias to reduce die size, then device integration density is improved, but parasitic inductance and random thickness variations damage circuit performance
Solution Approach 1:
The patent performs preliminary planarization of the substrate surface before fabricating passive devices and interconnect structures. This ensures that devices placed close to vias rest on a uniformly flat surface, eliminating random thickness variations and 'necking' effects that would otherwise occur at substrate-metal transitions
Solution Approach 2:
The patent introduces an intermediary planarized surface layer between the substrate and the passive devices/interconnects. This intermediary layer acts as a buffer that decouples the devices from the underlying substrate-metal transitions, preventing parasitic inductance and thickness variations from affecting device performance
2Reliability
If metal traces are used to connect passive devices to ground planes, then electrical connectivity is achieved, but inductive parasitic inductance is introduced that degrades RF performance
Solution Approach 1:
The patent extracts and removes the harmful metal trace interconnects between passive devices and ground planes. Instead of using traditional metal traces that introduce inductive parasitics, the design places passive devices directly on the planarized substrate surface in intimate proximity to vias, eliminating the need for separate connecting traces and thereby removing the source of parasitic inductance
Solution Approach 2:
The patent merges the passive device placement with the via structure itself, positioning devices directly adjacent to or over vias rather than separating them with metal traces. This merging of device location with ground reference eliminates the inductive interconnect path, combining the function of grounding and device operation into a single integrated structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces variability and parasitic inductance, improving device performance and reducing die size by ensuring uniformity across the substrate-metal transition, thereby enhancing the reliability of RF, microwave, and millimeter wave systems.
Implementation Method 1
depositing copper
Implementation Method 2
applying dielectric layers
Data Source
AI summary
The present invention includes a method for creating an annular capacitor adjacent to via or imbedded metal structure allowing for device to be made in close proximity to the via connecting to a ground plane. The annular capacitor in close proximity to the metal filled via or imbedded metal structure allows the construction of capacitors, filters, or active devices enabling a smaller RF device and/or to shunt a signal to the integrated ground plane. This reduces the RF, Electronic noise and results in a reduced device size.