Annular Vertical SI Etched Channel MOS Devices for MRAM
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Solution Overview
Problem
Conventional MRAM storage density has reached a limit due to the constraints of developing smaller cells, and other random access memory technologies cannot match the storage density of MRAM.
Innovation Solution
The method involves forming a cylindrical vertical transistor with an annular channel from a single block of electrically conductive material, forming an oxide layer, removing a portion of the oxide layer to create a source contact recess, ion-implanting the substrate, and depositing a silicide material to form a source contact tab, which allows for increased drive currents and reduced footprint of MRAM cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional planar MRAM cell structures are used, then the device can be manufactured with standard processes, but the storage density is limited due to the minimum footprint of individual cells
Solution Approach 1:
The patent transitions from a planar two-dimensional cell structure to a three-dimensional vertical structure by forming annular cylindrical channels extending vertically through the substrate. This dimensional change allows the channel to pass through multiple layers (word line, bit line, MTJ stack) vertically, dramatically reducing the lateral footprint of each cell while maintaining functionality. The vertical channel configuration enables higher storage density by stacking memory elements in the third dimension rather than expanding laterally.
2Quantity of substance
If the MRAM cell footprint is reduced to increase storage density, then more cells can be packed per unit area, but the drive current capability of each cell is reduced
Solution Approach 1:
By forming vertical annular channels that extend through the substrate thickness, the patent increases the effective channel length in the vertical dimension while reducing the lateral footprint. This vertical channel configuration allows sufficient channel length for adequate drive current capability while minimizing the lateral area occupied by each cell, thereby simultaneously achieving both high storage density and sufficient drive current.
Solution Approach 2:
The patent employs a composite material structure where the annular channel is formed from electrically conductive material (such as doped silicon or metal) surrounded by an oxide layer (such as silicon dioxide). This composite structure provides both the electrical conductivity needed for drive current and the insulation required for vertical stacking, enabling high-density three-dimensional integration while maintaining electrical performance.
3Ease of manufacture
If vertical annular cylindrical channel transistors are formed from a single block of electrically conductive material, then the manufacturing process is simplified, but precise control of channel dimensions and contact formation is challenging
Solution Approach 1:
The patent performs preliminary actions by first forming the annular cylindrical channel structure from a single block of electrically conductive material, then selectively removing oxide layers to create source contact recesses before final contact formation. This sequence of preliminary actions establishes the three-dimensional geometry and prepares precise contact locations, enabling subsequent ion implantation and silicide deposition to achieve accurate dimensional control and proper contact formation.
Solution Approach 2:
The patent applies local quality by selectively removing oxide layers from specific regions to create source contact recesses at defined locations around the annular channel. This localized material removal allows precise control of contact positions and dimensions while maintaining the integrity of the overall vertical channel structure, enabling accurate fabrication of the three-dimensional transistor geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the storage density and drive currents of MRAM devices by vertically arranging components, enabling a more compact and efficient memory cell structure.
Implementation Method 1
forming an oxide layer over exposed surfaces of the annular cylindrical channel and exposed surfaces of the block of electrically conductive material
Implementation Method 2
ion-implanting the exposed electrically conductive material substrate at a base of the source contact recess
Data Source
AI summary
A method, according to one embodiment, includes: forming an annular cylindrical channel from a single block of electrically conductive material; forming an oxide layer over exposed surfaces of the annular cylindrical channel and exposed surfaces of the block of electrically conductive material; removing a portion of the oxide layer from an exterior base of the annular cylindrical channel, thereby forming a source contact recess which surrounds the base of the annular cylindrical channel; ion-implanting the exposed electrically conductive material substrate at a base of the source contact recess; and depositing a silicide material in the source contact recess, thereby forming a source contact tab. Moreover, other systems and methods are also described in additional embodiments herein which provide various different improved processes of forming the annular cylindrical channels, the source contact tabs, and/or the cylindrical pillar gate contacts for vertical transistor structures in comparison to conventional surface transistor structures.