Conductive Annulus-Stabilized TSVs for Backside CMP Planarization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor device interconnects is that the chemical mechanical polishing (CMP) process used for back side TSV planarization often results in TSV toppling, leading to reduced process yield and electrical shorts due to insufficient mechanical support, especially as TSV dimensions are scaled down.
Innovation Solution
A conductive annulus is formed around the exposed end region of the TSV to provide mechanical stability during polishing, enhancing the yield of back side TSV planarization and the strength of bond pads by surrounding the protruding end region in a horizontal plane.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CMP process is used for back side TSV planarization, then planarization is achieved, but TSV toppling occurs due to insufficient mechanical support
Solution Approach 1:
A conductive annulus structure is formed around the TSV before the CMP process to provide preliminary mechanical support. This annulus acts as a stabilizing framework that prevents TSV toppling during the subsequent planarization operation, allowing the CMP process to proceed without causing structural damage to the TSV.
Solution Approach 2:
The conductive annulus serves as an intermediary structure between the TSV and the CMP polishing head. It provides mechanical support to the TSV during polishing while being removable after the process, thus mediating between the need for planarization and the need to preserve TSV integrity.
2Area of moving object
If TSV dimensions are scaled down to increase density, then device capacity increases, but mechanical support becomes insufficient leading to toppling
Solution Approach 1:
The conductive annulus provides localized mechanical support specifically at the critical regions around the scaled-down TSV. By concentrating support where it is most needed (at the TSV periphery during CMP), the annulus compensates for the reduced inherent strength of smaller TSV dimensions without adding overall device volume.
Solution Approach 2:
The conductive annulus is formed using composite material deposition (seed layer followed by copper electroplating), creating a structure with both mechanical strength and electrical conductivity. This composite approach provides the necessary mechanical support for scaled-down TSVs while maintaining electrical functionality.
3Reliability
If conductive annulus is formed around TSV, then mechanical stability improves, but device complexity increases
Solution Approach 1:
The conductive annulus serves multiple functions simultaneously: it provides mechanical support during CMP, acts as an electrical conductor for signal transmission, and can serve as a bonding surface for subsequent processing steps. This multi-functionality reduces the need for separate structures, thereby limiting the increase in device complexity.
Solution Approach 2:
The conductive annulus merges the mechanical support function with the electrical interconnect function into a single integrated structure. Instead of having separate support structures and conductors, the annulus combines both roles, simplifying the overall device architecture despite the additional processing steps required to form it.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The conductive annulus significantly improves the mechanical stability of TSVs during planarization, reducing toppling issues and enhancing bond pad strength, thereby increasing the yield and reliability of electrical connections between stacked semiconductor devices.
Implementation Method 1
the TSVs are thinned in back side wafer planarization by using a chemical mechanical polishing (CMP) process
Data Source
AI summary
A semiconductor device assembly including a through-silicon via (TSV) having an end region protruding from a back side of the substrate, the end region being surrounded by a conductive annulus disposed over the back side of the substrate; a dielectric layer disposed over the back side of the substrate, the dielectric layer having an upper surface flush with an upper surface of the end region of the TSV and flush with an upper surface of the conductive annulus; and a bond pad disposed over and electrically coupled to the end region of the TSV and the conductive annulus.