Anodic Bonding via High-Resistance Via Covering
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Solution Overview
Problem
Conventional anodic bonding techniques for glass and semiconductor substrates face challenges in maintaining stable process conditions due to low-resistance current paths through contact vias, which hinder the formation of a sufficient depletion zone and internal electric field, resulting in unreliable connections.
Innovation Solution
Covering contact vias on the glass substrate with a high-resistance material or layer to create a high-resistance path, allowing for controlled application of voltage, temperature, and pressure to establish a reliable bond between the glass and semiconductor materials, ensuring a firm connection through Si—O—Si bonds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional anodic bonding is used with contact vias, then electrical connection is enabled, but process stability deteriorates due to low-resistance current paths
Solution Approach 1:
The patent applies different resistance characteristics to different regions of the glass substrate. Contact vias are covered with high-resistance material to prevent low-resistance current paths, while non-contact regions maintain their original properties for proper anodic bonding. This local differentiation resolves the contradiction by enabling electrical connection only where needed while maintaining process stability elsewhere.
Solution Approach 2:
A high-resistance covering layer is introduced as an intermediary between the contact vias and the bonding interface. This layer acts as a mediator that allows electrical connection through the vias while preventing the formation of low-resistance current paths that would destabilize the bonding process, thus resolving the contradiction between connection reliability and process stability.
2Reliability
If contact vias are left uncovered, then electrical connection is achieved, but depletion zone formation is insufficient
Solution Approach 1:
The patent selectively covers contact vias with high-resistance material while leaving other regions uncovered. This local quality differentiation ensures that depletion zones form properly in non-contact regions for reliable bonding, while contact vias maintain their electrical connection function without interfering with the overall bonding process.
3Strength
If high voltage is applied for anodic bonding, then bonding strength increases, but current flow through contact vias increases
Solution Approach 1:
The patent converts the potentially harmful effect of current flow through contact vias into a beneficial configuration by covering the vias with high-resistance material. This prevents energy loss through unwanted current paths while allowing the necessary high voltage to be applied for strong bonding, thus resolving the contradiction between bonding strength and energy efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables robust and reliable bonding with consistent process parameters, enhancing the mechanical and thermal stability of the bond, suitable for large-area applications and maintaining the properties of glass as a passivating housing material.
Implementation Method 1
Under the influence of a temperature which is, for example, within a range of 300°C to 500° C., the glass material becomes sufficiently conductive so that a corresponding ion migration and thus a certain current flow through the glass material is possible.
Implementation Method 2
oxygen ions migrate towards the silicon wafer and thus towards the interface between the glass wafer and the silicon wafer
Implementation Method 3
the corresponding unit that is composed of the semiconductor device including the numerous device components and the housing can be electrically or mechanically connected with further components
Data Source
AI summary
Methods for the production of a semiconductor device are disclosed. In one embodiment, a method may include: (1) mechanically contacting a first substrate (100) having a semiconductor material to a second substrate (200) having a bondable passivation material and contact vias (210) extending through the bondable passivation material; (2) covering the contact vias (210) with an at least high-resistance material (220, 300) on a side facing away from the first substrate (100); (3) applying an electric potential between the at least high-resistance material and the first substrate. The potential has a sufficient level that is functionally sufficient to initiate a bonding process between the bondable passivation material of the second substrate and the semiconductor material of the first substrate.