Anodic Porous Oxide Planarization for Low-ESR Integrated Capacitors
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Solution Overview
Problem
The presence of aluminum residues at the interface between anodic porous oxide regions and metal anodization barrier layers in silicon passive integration technologies leads to high Equivalent Series Resistance (ESR) and limited capacitance density due to uneven pore formation, which is exacerbated by the roughness of polycrystalline metal layers, causing some pores to not reach the barrier layer before anodization is stopped.
Innovation Solution
Planarizing the metal anodization barrier and anodizable metal layers to achieve a smooth surface with an average roughness of 1nm to 10nm, ensuring all pores extend uniformly to the metal anodization barrier layer, thereby preventing aluminum residues and allowing for the formation of substantially straight pores that reach the barrier layer simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the anodization process is stopped early to avoid wide oxide plugs, then aluminum residues are prevented, but pores may not reach the metal barrier layer
Solution Approach 1:
The patent changes the surface roughness parameter of the metal layer from its natural polycrystalline state to a planarized state with controlled roughness (Ra ≤ 10nm). This parameter change ensures uniform pore formation and growth, allowing all pores to reach the barrier layer simultaneously without forming excessive oxide plugs, thus resolving the contradiction between pore uniformity and electrical contact reliability
Solution Approach 2:
The patent applies planarization as a preliminary action before the anodization process. By flattening the metal layer surface in advance, the conditions for uniform pore formation are established beforehand, ensuring that during subsequent anodization, all pores progress uniformly and reach the barrier layer at the same time, preventing both aluminum residues and excessive oxide plugs
2Reliability
If the anodization time is extended to ensure pores reach the barrier layer, then electrical contact is improved, but wide oxide plugs form causing delamination
Solution Approach 1:
The patent modifies the surface roughness parameter of the metal layer before anodization, transforming it from a rough polycrystalline surface to a planarized surface with Ra ≤ 10nm. This parameter change ensures that during anodization, all pores start from uniform depths and progress at the same rate, allowing the process to be stopped at the optimal point where pores reach the barrier layer without forming excessive oxide plugs that would cause delamination
Solution Approach 2:
The planarization step is performed as a preliminary action to create uniform starting conditions for pore formation. This preliminary flattening of the metal surface ensures that during the anodization process, all pores initiate and progress uniformly, enabling precise control over the anodization duration to achieve complete barrier layer penetration without over-anodization and excessive oxide plug formation
3Ease of manufacture
If the metal layer surface is rough, then deposition is easier, but pores form unevenly with aluminum residues
Solution Approach 1:
The patent changes the surface roughness parameter of the deposited metal layer from its natural rough state to a planarized state with controlled roughness (Ra ≤ 10nm). This parameter transformation is achieved through planarization processes applied after deposition but before anodization, ensuring that subsequent pore formation occurs uniformly across the entire surface without aluminum residues, while the deposition process itself remains relatively simple
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that all pores reach the metal anodization barrier layer at the same time, preventing aluminum residues and reducing ESR, thereby enhancing capacitance density and enabling the formation of integrated capacitors with improved electrical contact and reduced resistance.
Implementation Method 1
The anodization converts the aluminum layer into porous anodic alumina
Implementation Method 2
The anodization converts the aluminum layer into porous anodic alumina
Implementation Method 3
Planarizing the metal anodization barrier and anodizable metal layers to achieve a smooth surface with an average roughness of 1nm to 10nm
Implementation Method 4
removing these wide plugs has been observed to result in the anodic porous oxide delaminating completely
Data Source
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AI summary
A method of manufacturing an integrated device comprising an anodic porous oxide region comprising: forming, on a substrate, a metal anodization barrier layer, planarizing the metal anodization barrier layer, forming, on the planarized metal anodization barrier layer (201P), an anodizable metal layer, planarizing the anodizable metal layer, anodizing the planarized anodizable metal layer to obtain the anodic porous oxide region (203) comprising a plurality of substantially straight pores that extend from a top surface of the anodic porous oxide region towards the metal anodization barrier layer.