Anodized Layer Defines FET Channel Length
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Solution Overview
Problem
Conventional field effect transistors (FETs) face challenges in achieving precise control over the channel length, which affects switching speed and efficiency, due to the limitations of existing fabrication methods that require fine resolution and precise patterning.
Innovation Solution
The method involves forming a field effect transistor with a gate electrode, a semiconductor strip, and source/drain electrodes, where the channel length is defined by an anodized insulating layer, allowing for a relatively simple and economical process with considerable tolerance in edge positions and thickness, enabling the formation of a thin film FET with a small channel length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods with fine resolution and precise patterning are used to define channel length, then manufacturing precision is improved, but device complexity and fabrication difficulty increase
Solution Approach 1:
The patent introduces an anodized layer as an intermediary substance that defines the channel length. Instead of directly patterning the semiconductor channel to the required precision, a sacrificial anodized layer is formed on the substrate, and its thickness (controlled by electrochemical parameters rather than mechanical patterning) determines the final channel length after the layer is removed. This mediator transfers the dimensional control from high-precision patterning to more controllable electrochemical deposition parameters.
Solution Approach 2:
The patent replaces mechanical/optical patterning systems (photolithography, etching) with an electrochemical system (anodization) to define the channel length dimension. The anodization process uses electrical parameters (current density, time, electrolyte composition) to control the thickness of the anodized layer, which subsequently defines the channel length. This substitution allows for simpler, more tolerant fabrication processes while achieving the required dimensional control.
2Manufacturing precision
If conventional precise patterning methods are used, then channel length definition accuracy is improved, but ease of manufacture deteriorates
Solution Approach 1:
The anodized layer serves as a sacrificial intermediary that simplifies the fabrication process. The channel length is defined by the thickness of this layer, which can be controlled by straightforward electrochemical parameters rather than complex patterning steps. After the anodized layer is formed, subsequent processing steps become simpler because the critical dimension is already established by the anodization process rather than requiring high-precision patterning.
Solution Approach 2:
The patent changes the controlling parameters for channel length definition from geometric/patterning parameters (photolithography resolution, etch selectivity) to electrochemical parameters (anodization current density, time, electrolyte composition, temperature). These electrochemical parameters are easier to control and provide more tolerance, simplifying the manufacturing process while maintaining precision in the final channel length definition.
3Ease of manufacture
If thin film FET with small channel length is produced using low-precision techniques, then ease of manufacture is improved, but manufacturing precision deteriorates
Solution Approach 1:
The anodized layer acts as a precision-defining intermediary that bridges the gap between low-precision substrate preparation and the requirement for precise channel length. The substrate and initial layers can be formed with relaxed tolerances, but the anodization process subsequently establishes the exact channel length dimension through controlled electrochemical deposition, ensuring precision in the final product despite the use of lower-precision techniques in earlier steps.
Solution Approach 2:
The anodized layer is formed in advance as a sacrificial template that pre-defines the channel length dimension before the actual semiconductor channel is formed. This preliminary action establishes the critical dimension early in the process, allowing subsequent steps to proceed with greater tolerance while ensuring the final channel length meets specifications. The anodized layer is later removed, leaving the precisely-defined channel structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of FETs with controlled channel lengths, enhancing switching speed and efficiency while simplifying the fabrication process, making it possible to produce transistors with channel lengths in the region of a few micrometers using relatively low-precision techniques.
Implementation Method 1
The channel length is defined by an anodized insulating layer
Data Source
AI summary
In one method of forming a semiconductor device, a first electrode is formed electrically coupled with a semiconductor material. After the first electrode is formed, an insulator is formed over the semiconductor material adjoining the first electrode and extending a selected distance from the first electrode. After the insulator is formed, a second electrode is formed electrically coupled with the semiconductor material adjoining the insulator.