Anomaly-Shaped Display Panel Test Transistor Arrangement
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Solution Overview
Problem
Display panels with anomaly shapes face challenges in arranging test transistors and wiring lines for effective testing due to increased frame region size, leading to potential inaccuracies from unintended contacts.
Innovation Solution
The arrangement of test transistors and wiring lines is optimized by placing first test transistors along gate lines and second test transistors along data lines in non-straight patterns, with controlled signal supply wiring branching to minimize frame region size and prevent wiring line contacts, allowing for accurate testing in anomaly-shaped display panels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If test transistors and test wiring lines are arranged in a frame region around the display region to enable testing, then testing capability is provided, but the frame region becomes large in size
Solution Approach 1:
The patent changes the arrangement pattern of test transistors from a conventional straight line to a curved line following the anomaly shape contour. This dimensional change in arrangement pattern allows the test transistors to be positioned closer to the display region while maintaining testing capability, thereby reducing the frame region area.
Solution Approach 2:
The patent applies asymmetric arrangement where test transistors connected to gate lines crossing the anomaly part are arranged in a curved pattern, while other test transistors may maintain different arrangements. This asymmetric approach optimizes the frame region size by adapting the arrangement to the specific anomaly shape rather than using a uniform pattern.
2Ease of manufacture
If test transistors and test wiring lines are arranged in a conventional straight line pattern, then arrangement is simple, but unintended contact between wiring lines occurs leading to inaccurate testing
Solution Approach 1:
The patent replaces the straight line arrangement with a curved line arrangement that follows the anomaly shape. This curvature allows the test wiring lines to navigate around the anomaly part, preventing unintended contacts while maintaining manufacturing feasibility. The curved path naturally separates wiring lines that would otherwise intersect in a straight arrangement.
3Reliability
If test transistors are arranged to follow the anomaly shape, then wiring line contacts are prevented, but arrangement complexity increases
Solution Approach 1:
The patent applies local quality by arranging test transistors in a curved pattern specifically in the regions where gate lines or data lines cross the anomaly part. Other regions may maintain simpler arrangements. This localized application of curved arrangement reduces overall complexity while maintaining wiring line separation where it is most needed.
Data Source
AI summary
Provided is a display panel, including: a display region having an anomaly shape; a plurality of first test transistors; a plurality of second test transistors; and test control signal supply wiring through which a control signal for turning on or off the first and second test transistors is to be supplied, in which first test transistors connected to gate lines crossing an anomaly part of the anomaly shape and second test transistors connected to data lines crossing the anomaly part are arranged in other patterns than a straight line, and in which the test control signal supply wiring includes first test control signal supply wiring, which is connected to control electrodes of the plurality of first test transistors, and second test control signal supply wiring, which is branched out from the first test control signal supply wiring and is connected to control electrodes of the plurality of second test transistors.