ANPC Circuit Switching Sequence for Balanced Transistor Losses
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Solution Overview
Problem
Existing ANPC converters face imbalanced switching losses between inner and outer transistors due to different switching frequencies, leading to inefficiencies in power distribution.
Innovation Solution
A method for driving the ANPC circuit that balances switching losses by determining an output state switching sequence for inner and outer transistors within two half switching cycles, generating control signals based on this sequence to optimize the on-off states of the transistors, and incorporating zero-level output states to balance both switching and on-state losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the outer transistor and clamping transistor are turned on or off at high frequency while the inner transistor is turned on or off at power frequency (ANPC-1), then the switching control flexibility is improved, but the outer transistor experiences greater switching loss than the inner transistor
Solution Approach 1:
The patent applies periodic action by alternating between two drive distribution manners (ANPC-1 and ANPC-2) in a cyclic fashion. During one half-cycle, ANPC-1 is used where outer transistors switch at high frequency; during the next half-cycle, ANPC-2 is used where inner transistors switch at high frequency. This periodic switching of drive modes balances the cumulative switching losses across all transistors over a complete cycle while maintaining the flexibility benefits of high-frequency switching.
2Adaptability or versatility
If the inner transistor is turned on or off at high frequency while other transistors are turned on or off at power frequency (ANPC-2), then the switching control flexibility is improved, but the inner transistor experiences greater switching loss than the outer transistor
Solution Approach 1:
The patent applies periodic action by alternating between two drive distribution manners (ANPC-1 and ANPC-2) in a cyclic fashion. During one half-cycle, ANPC-1 is used where outer transistors switch at high frequency; during the next half-cycle, ANPC-2 is used where inner transistors switch at high frequency. This periodic switching of drive modes balances the cumulative switching losses across all transistors over a complete cycle while maintaining the flexibility benefits of high-frequency switching.
3Device complexity
If a single drive distribution manner is used for all transistors, then the control scheme is simple, but the switching losses of different transistors cannot be balanced
Solution Approach 1:
The patent implements a periodic switching strategy where the drive distribution manner changes every half-cycle. The controller alternates between ANPC-1 and ANPC-2 modes, creating a time-varying control scheme that appears complex instantaneously but follows a simple periodic pattern. This periodic approach achieves loss balancing without requiring complex real-time decision-making or additional hardware.
Solution Approach 2:
The patent segments the switching cycle into two distinct half-cycles, each with its own drive distribution manner. By dividing the complete switching cycle into separate segments (first half-cycle using ANPC-1, second half-cycle using ANPC-2), the patent enables independent optimization of transistor switching patterns in each segment, achieving overall loss balancing through the combination of segmented approaches.
Data Source
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AI summary
The present application provides a converter and an ANPC circuit driving method therefor. The ANPC circuit driving method comprises: first, with the goal of enabling an ANPC circuit in a converter to respectively use inner transistors and outer transistors to bear switching loss in two half switching periods of a switching period, determining an output state switching sequence of the ANPC circuit; and then, generating and outputting switching transistor control signals of the ANPC circuit according to the output state switching sequence. Thus, the ANPC circuit can realize the balance of switching loss of the inner and outer transistors; moreover, the balance granularity of the switching loss is a half switching period, so that the balance effect is fine, and the loss fluctuation is low.