Antenna Diodes for Charge Discharge in 3D Memory Etching

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Solution Overview

Problem

Plasma etch processes in three-dimensional memory devices can lead to local electrical discharge and charge buildup, causing distortions in the shape of etched openings, such as backside trenches, due to the dielectric material layers used in the alternating stack of insulating and spacer layers.

Innovation Solution

Incorporating antenna diodes on the semiconductor substrate, which are electrically shorted to lower-level metal interconnect structures, to prevent charge buildup by providing a discharge path for electrical charges during plasma etching, thus maintaining the vertical integrity of the trenches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dielectric material layers are used in the alternating stack for plasma etching, then the etching process can be performed, but local electrical discharge and charge buildup occur causing distortions in the shape of etched openings

Engineering Contradiction:
Improveplasma etching capabilityVSAvoidshape precision of etched openings
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Antenna diodes are introduced as intermediary structures to provide a controlled discharge path for electrical charges during plasma etching. The diodes act as mediators between the plasma process and the dielectric layers, preventing charge buildup that would otherwise cause distortions in etched opening shapes while maintaining the plasma etching process capability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If antenna diodes are added to prevent charge buildup, then shape precision of etched openings is improved, but device complexity increases

Engineering Contradiction:
Improveshape precision of etched openingsVSAvoidstructural complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Rather than modifying the entire device structure, antenna diodes are strategically placed only at specific locations where charge buildup problems occur during plasma etching. This localized approach provides the necessary charge dissipation function without adding complexity to the entire device, maintaining simplicity while improving etching precision

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of antenna diodes effectively reduces or prevents charge accumulation, ensuring straight vertical profiles of backside trenches and improving the precision of plasma etching processes in three-dimensional memory devices.

Implementation Method 1

Incorporating antenna diodes on the semiconductor substrate, which are electrically shorted to lower-level metal interconnect structures, to prevent charge buildup by providing a discharge path for electrical charges during plasma etching

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

Plasma etch processes in three-dimensional memory devices can lead to local electrical discharge and charge buildup, causing distortions in the shape of etched openings

Methodology Applied
Scientific EffectPlasma: Plasma

Data Source

PatentUS10580787B2Three-dimensional memory device containing dummy antenna diodes
Publication Date: 2020.03.03 SANDISK TECHNOLOGIES LLC
  • US10580787B2 patent drawing
  • US10580787B2 patent drawing
  • US10580787B2 patent drawing

AI summary

At least one diode, lower-level metal interconnect structures embedded within lower-level dielectric material layers, and a doped semiconductor material layer are formed over a semiconductor substrate. An electrically conductive path is provided between the at least one diode and the doped semiconductor material layer. An alternating stack of insulating layers and spacer material layers and memory stack structures extending therethrough are formed above the doped semiconductor material layer. A backside trench is formed through the alternating stack. The electrically conductive path is employed during plasma etch processes employed to form the memory stack structures and the backside trench to provide a discharge path for accumulated electrical charges. The electrically conductive path is subsequently disconnected by removing a conductive component underlying the backside trench. The spacer material layers can be replaced with electrically conductive layers employing the backside trench.