Antenna Diodes for Non-Stick Pads in System-in-Package Assembly
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Solution Overview
Problem
Conventional system-in-package (SIP) chip assembly faces challenges with non-stick or floating pads on redistribution layers, leading to yield loss and increased costs due to the need for additional substrates and costly functional tests.
Innovation Solution
The use of antenna diodes to create conductive paths between pads and substrates, eliminating non-stick issues by forming p-n junctions and providing electrostatic discharge protection without requiring additional substrates, allowing for efficient wire connections and packaging of multiple integrated circuit dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a package substrate is used to connect multiple integrated circuit dies, then reliable electrical connections are achieved, but manufacturing cost increases and device complexity increases
Solution Approach 1:
The patent extracts the substrate from the package structure, eliminating the need for a separate package substrate. Instead, the dies are directly interconnected through wire bonding and redistribution layers formed on the die surfaces themselves, thereby reducing device complexity while maintaining connection reliability
Solution Approach 2:
The patent merges the functions of the package substrate and the die interconnect structure into a single integrated system. The redistribution layers and wire bonding structures perform both the interconnection and the packaging functions simultaneously, eliminating the need for separate substrate components
2Ease of manufacture
If conventional wire bonding is performed without antenna diodes, then assembly process is simpler, but non-stick pads cause yield loss and functional test failures
Solution Approach 1:
The patent applies preliminary action by forming antenna diodes on the redistribution layers before wire bonding occurs. These diodes pre-establish conductive paths and prevent pad floating issues, ensuring reliable bonding without compromising manufacturing simplicity
Solution Approach 2:
The antenna diodes act as intermediary elements between the floating pads and the wire bonding process. They provide a conductive pathway that mediates the bonding operation, preventing non-stick failures while maintaining the simplicity of the overall manufacturing process
3Device complexity
If multiple integrated circuit dies are connected without antenna diodes, then device complexity is reduced, but non-stick pads lead to yield loss
Solution Approach 1:
The patent applies local quality by adding antenna diodes only at specific locations where redistribution layers have floating pads. This localized approach addresses the non-stick pad issue without adding complexity to the entire interconnect structure, thereby maintaining low device complexity while improving assembly yield
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable wire connections, reduces yield loss, and eliminates the need for costly substrate connections, enhancing the assembly efficiency and quality of SIP chips by addressing non-stick pad issues during the assembly stage.
Implementation Method 1
disposing a diode in the first integrated circuit die, wherein a positive terminal of the diode is electrically connected to first terminal and a negative terminal of the diode is electrically connected to a first substrate of the first integrated circuit die
Implementation Method 2
electrostatic discharge (ESD) protection can be provided through the antenna diodes across two different power domains by disposing a diode in one integrated circuit die for ESD protection of a terminal in another integrated circuit die
Data Source
AI summary
A method for assembling multiple integrated circuit dies into a system-in-package chip is disclosed, the method comprising: providing a plurality of integrated circuit dies; disposing at least one redistribution layer on at least one of the plurality of integrated circuit dies for making wire connections among the plurality of integrated circuit dies without using a substrate underneath the plurality of integrated circuit dies; establishing wire connections among the plurality of integrated circuit dies and verifying the plurality of wire connections; and packaging the plurality of integrated circuit dies and the verified wire connections into a system-in-package chip.