Antenna Package Structure for Compact 3D Fan-Out Integration

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Solution Overview

Problem

The semiconductor industry faces challenges in miniaturization and packaging techniques for semiconductor devices, particularly in stacked and bonded semiconductor devices, where advanced bonding processes are desired to reduce physical size and improve performance.

Innovation Solution

A method for forming an antenna package with heterogeneous fan-out structures that includes forming conductive features and through-vias on a core substrate, using laser drilling and electroless plating, and integrating multiple antenna types such as patch and end-fire antennas, along with thermal vias for improved heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If repeated reductions in minimum feature size are used to improve integration density, then more components can be integrated into a given area, but manufacturing complexity and difficulty increase

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from planar 2D integration to 3D vertical stacking by bonding multiple semiconductor dies together. This dimensional change allows continued increase in integration density without further reducing feature sizes, thereby avoiding the associated manufacturing complexity and difficulty of sub-20 nm processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If stacked and bonded semiconductor devices are used to reduce physical size, then device miniaturization is achieved, but bonding process complexity increases

Engineering Contradiction:
Improvephysical sizeVSAvoidbonding process complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent divides the semiconductor device into multiple separate dies that can be independently fabricated using standard processes, then bonded together. This segmentation allows each die to be manufactured with conventional techniques while achieving compact 3D integration, reducing overall bonding process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs wire bonds that serve multiple functions: providing electrical interconnects between dies and acting as mechanical support structures. This multi-functionality reduces the number of separate components and processes needed, simplifying the overall bonding process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If sophisticated bonding techniques are used to improve device performance, then functional integration is enhanced, but manufacturing difficulty increases

Engineering Contradiction:
Improvefunctional integrationVSAvoidmanufacturing difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses the wire bonds themselves to provide both electrical connectivity and mechanical support between dies. The bonds self-organize to fulfill multiple requirements, eliminating the need for separate complex alignment and support structures, thereby reducing manufacturing difficulty while maintaining functional integration.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method allows for reduced package size, enhanced antenna directionality, and improved thermal management, facilitating efficient manufacturing and performance of semiconductor devices.

Implementation Method 1

forming conductive features and through-vias on a core substrate, using laser drilling

Methodology Applied
Scientific EffectLaser drilling: Laser Ablation

Implementation Method 2

using laser drilling and electroless plating

Methodology Applied
Scientific EffectElectroless plating: Electroplating

Implementation Method 3

integrating multiple antenna types such as patch and end-fire antennas, along with thermal vias for improved heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12412851B2Semiconductor device and method of manufacture
Publication Date: 2025.09.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12412851B2 patent drawing
  • US12412851B2 patent drawing
  • US12412851B2 patent drawing

AI summary

A device includes a redistribution structure, a first semiconductor device, a first antenna, and a first conductive pillar on the redistribution structure that are electrically connected to the redistribution structure, an antenna structure over the first semiconductor device, wherein the antenna structure includes a second antenna that is different from the first antenna, wherein the antenna structure includes an external connection bonded to the first conductive pillar, and a molding material extending between the antenna structure and the redistribution structure, the molding material surrounding the first semiconductor device, the first antenna, the external connection, and the first conductive pillar.