Antenna Packaging Module Signal Loss Reduction
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Solution Overview
Problem
Current antenna packaging technologies, such as conventional and wafer-level packaging methods, face challenges with signal loss and limited layout flexibility due to bulky designs and reliance on external circuit boards, which hinder the miniaturization and integration of wireless communication devices.
Innovation Solution
A method for making an antenna packaging module that includes a substrate with a redistribution layer, stacked antenna structures, and a semiconductor chip, where the antenna structures have feeder lines and metal layers connected through packaging layers, and a connector is formed to directly connect with the circuit board, reducing signal loss and enhancing layout flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If antennas are directly prepared on a printed circuit board, then external connection is achieved, but the circuit board volume becomes bulky and integration is poor
Solution Approach 1:
The patent merges the antenna structure with the packaging substrate by integrating antennas into the redistribution layer or core layer of the packaging module. This combination eliminates the need for separate circuit board antenna preparations, achieving external connection functionality while maintaining compact volume through unified structure design.
Solution Approach 2:
The patent transitions from planar antenna layout on circuit board surfaces to three-dimensional antenna structures within the packaging layers. By utilizing vertical stacking and multi-layer configurations within the packaging module, the design achieves external connection capability without increasing the horizontal footprint, thus reducing overall circuit board volume.
2Ease of manufacture
If current redistribution layer is used, then chip interconnection is achieved, but the RDL is too thin to interconnect to other components through both surfaces
Solution Approach 1:
The patent segments the redistribution function across multiple layers including core layers and packaging layers. Instead of relying on a single thin RDL, the interconnection path is divided into multiple conductive layers that can be independently optimized, enabling through-surface interconnection capability while maintaining manufacturing ease.
Solution Approach 2:
The patent employs composite packaging structures with multiple material layers including conductive layers, dielectric layers, and bonding layers. This composite construction provides both the mechanical support needed for thin-layer fabrication and the conductive pathways required for multi-surface interconnection, resolving the limitation of single-layer thin RDL.
3Ease of manufacture
If metal wire ends from flip-chip interconnect process are used, then chip mounting is achieved, but layout flexibility is limited
Solution Approach 1:
The patent designs the packaging substrate with multi-functional features that serve both chip mounting and antenna integration purposes. The redistribution layer and core layer structures are configured to provide universal interconnection points that accommodate various chip layouts and antenna configurations, thereby maintaining manufacturing ease while enhancing layout flexibility.
Data Source
AI summary
The application describes an antenna packaging module for a semiconductor chip and a method for making it. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a metal bump, a third packaging layer and a packaging antenna connector. The antenna structure comprises a connector opening, a first antenna structure and a second antenna structure stacked on the second surface of the redistribution layer. The packaging antenna connector is disposed in the connector opening, and is electrically connected to the redistribution layer. Electrical interconnection of packaging an antenna connector in a connector opening in the packaging layer, the antenna signal loss is reduced, and the overall e advantage of WLP AiP is further improved.