Antenna Array Receiver Circuit With Randomized TI-ADC Selection
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Solution Overview
Problem
Time-interleaved analog-to-digital converters (TI-ADCs) in 5G antenna array systems face mismatch errors due to timing skew, phase, gain, and DC offset, leading to degraded spurious-free dynamic range (SFDR) and increased power consumption, especially when multiple ADCs are integrated into a single chip.
Innovation Solution
Implementing a receiver circuit with multiple time-interleaved ADCs that use different selection sequences for sub-ADC operation, including random or pseudo-random sequences, to decorrelate spurious signal components across receivers, thereby suppressing errors in the combined output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If time-interleaved ADCs with multiple sub ADCs are used to accommodate larger bandwidths, then the conversion rate is improved, but mismatch errors between sub ADCs lead to degraded spurious-free dynamic range
Solution Approach 1:
The system divides the high-rate conversion task into multiple parallel sub-ADCs operating at lower rates, with each sub-ADC handling a portion of the total conversion rate. This segmentation allows the overall system to achieve high conversion rates while individual components operate within acceptable precision limits.
Solution Approach 2:
The patent applies randomization to change the temporal parameters of sub-ADC selection, using random or pseudo-random sequences to determine which sub-ADC processes each sample. This parameter change transforms the deterministic mismatch pattern into a stochastic process, spreading spurious components across the frequency spectrum and improving SFDR.
2Device complexity
If multiple ADCs are integrated into one chip for cost and power consumption reasons, then device complexity is reduced, but mismatch effects between ADCs still occur
Solution Approach 1:
Multiple ADC chips are combined into a single integrated system, sharing common resources such as the clock distribution network, control logic, and output buffering. This merging reduces overall device complexity and power consumption while maintaining the benefits of multiple parallel converters.
Solution Approach 2:
Randomization sequences are applied to vary the selection pattern of sub-ADCs across different receivers, transforming systematic mismatch errors into random-like variations that can be averaged out in the combined output, thereby improving precision despite integration.
3Measurement precision
If redundant sub ADCs are introduced to spread errors across the Nyquist range, then spurious-free dynamic range is improved, but total error power is not reduced
Solution Approach 1:
The system dynamically selects which sub-ADC processes each sample using random or pseudo-random sequences, creating a time-varying allocation pattern. This dynamic approach ensures that errors from any single sub-ADC are distributed across different time instances and frequency bins, improving SFDR without requiring permanent redundancy.
Solution Approach 2:
By changing the selection parameter from deterministic to random, the patent transforms concentrated error power into dispersed error power across the frequency spectrum, achieving improved SFDR with the same number of sub-ADCs rather than requiring additional redundant converters.
4Measurement precision
If different selection sequences are used in different receivers, then uncorrelated errors are suppressed in combined output, but control circuit complexity increases
Solution Approach 1:
Each receiver is equipped with its own unique randomization sequence generator, providing locally optimized error suppression characteristics. This local quality differentiation ensures that errors from different receivers are uncorrelated, enabling effective suppression in the combined output while keeping each receiver's control circuit relatively simple.
Solution Approach 2:
The patent implements randomization at the receiver level rather than requiring complex centralized control, applying partial randomization (per-receiver rather than system-wide coordination) to achieve sufficient error suppression with minimal control circuit complexity.
Data Source
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AI summary
A receiver circuit for an antenna array system (AAS) is disclosed. The receiver circuit (10) comprises a set of receivers (151-15 p ). Each receiver (151-15 p ) comprises a first TI-ADC (351) in a receive path of the receiver. The first TI-ADC (351) comprises a plurality of sub ADCs (A1-A M+N ). Each receiver (151-15 p ) comprises a control circuit (40) configured to select which sub ADC (A1-A M+N ) is to operate on what input sample based on a first selection sequence. The control circuits (40) in the different receivers (151-15 p ) in said set of receivers (151-15 p ) are configured to use different first selection sequences.