Anti-Arcing Layer for Semiconductor Wafer Back-Side Processing
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Solution Overview
Problem
Current back-side processing techniques for semiconductor wafers suffer from arcing defects, which reduce the yield of usable wafers due to electron accumulation in certain areas of the dielectric layer.
Innovation Solution
An anti-arcing layer, typically made of conductive materials like tantalum metal, is deposited over the dielectric layer to provide a uniform potential surface, preventing electron accumulation and plasma-induced damage by acting as an electromagnetic interference shielding layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If back-side processing is performed on semiconductor wafers, then electrical connectivity between front and back sides is achieved, but arcing defects occur due to electron accumulation in the dielectric layer
Solution Approach 1:
A conductive layer is deposited over the dielectric layer on the back side of the wafer to serve as an intermediary that dissipates accumulated electrons and prevents arcing defects, while maintaining the electrical connectivity achieved through back-side processing
2Device complexity
If conventional back-side processing is used, then manufacturing complexity is kept simple, but yield is reduced due to arcing defects
Solution Approach 1:
A conductive layer is deposited in advance over the dielectric layer before subsequent processing steps, creating a protective layer that prevents electron accumulation and arcing defects, thereby improving wafer yield without significantly increasing processing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The anti-arcing layer significantly reduces arcing defects from 30-50% to nearly 0%, enhancing the yield of processed wafers by preventing electron accumulation and plasma-induced damage during back-side processing.
Implementation Method 1
An anti-arcing layer, typically made of conductive materials like tantalum metal, is deposited over the dielectric layer to provide a uniform potential surface, preventing electron accumulation and plasma-induced damage by acting as an electromagnetic interference shielding layer
Data Source
AI summary
A method for preventing arcing during processing of a back side of a semiconductor wafer is provided herein. The method comprising includes steps of depositing a dielectric layer over the back side and depositing an anti-arcing layer over the dielectric layer. The anti-arcing layer is a conductive layer, but it not suitable for conducting signals or power. The method further includes etching an opening through a plurality of material layers of the semiconductor wafer. The opening exposes a conductive layer located on a front side of the semiconductor wafer. Additionally, the method includes depositing a conductive layer in the opening to form a through-wafer interconnect. A semiconductor wafer fabricated according to the method is also disclosed.


