Anti-Flare CMOS Image Sensor Package With Light-Blocking Lid
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current CMOS image sensor chip scale packages (CISCSPs) suffer from flare issues due to light entering through the transparent glass covering, which degrades image quality by reflecting off metal structures within the package.
Innovation Solution
The implementation of a semiconductor package design that includes an optically transmissive lid coupled to the semiconductor die through dams, with a light blocking material around the edges and recesses on the lid to prevent stray light from entering non-sensor areas, using materials like molding compounds to encapsulate the package and create openings only over the active sensor areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a transparent glass lid is used to cover the entire chip, then the package achieves a small/thin form and low cost, but light enters through the transparent glass and reflects off metal structures causing flare that degrades image quality
Solution Approach 1:
The patent applies local quality by making the lid partially transparent and partially opaque. Specifically, the lid has a transparent portion over the active sensor area and an opaque portion over non-active areas. This allows light to pass through only where needed (over the sensor) while blocking stray light from entering non-sensor areas, thereby resolving the contradiction between maintaining manufacturing simplicity and preventing flare.
2Device complexity
If a transparent glass lid covers the entire chip, then the package structure is simple, but light enters non-sensor areas and reflects off metal structures within the package degrading image quality
Solution Approach 1:
The lid is designed with different optical properties in different regions: transparent over the active sensor area and opaque over non-active areas. This local differentiation prevents stray light from entering non-sensor areas while maintaining a relatively simple overall package structure, thus resolving the contradiction between device complexity and flare prevention.
3Object-affected harmful factors
If light blocking material is added around the edges and recesses on the lid, then flare is prevented by blocking light from non-sensor areas, but the package structure becomes more complex
Solution Approach 1:
The patent merges the light-blocking function with the existing lid structure by forming the opaque portion as an integrated part of the lid itself, rather than adding separate light-blocking components. The lid combines both transparent and opaque regions in a single structure, which prevents flare while minimizing increases in package complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively prevents flare by blocking light from entering non-sensor areas, enhancing image quality by reducing reflections and improving the overall performance of the image sensor.
Implementation Method 1
a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid
Implementation Method 2
an optically transmissive lid coupled to the semiconductor die through dams
Data Source
AI summary
Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.