Programmable Anti-Fuse Circuitry Using Snapback Voltage Breakdown
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Solution Overview
Problem
Existing anti-fuse circuitry solutions, such as poly-silicon fuses and gate oxide anti-fuses, are unreliable, require high voltages, consume significant chip area and power, and cannot be programmed outside the process flow, necessitating a more reliable and efficient programmable anti-fuse solution.
Innovation Solution
The implementation of programmable anti-fuse circuitry comprising a pair of anti-fuse devices with control logic to generate specific voltage levels for programming, where each anti-fuse device is coupled between a supply voltage and ground, allowing for snapback at normal operating voltages without high voltage requirements, and a MOS transistor to sense the node voltage, enabling efficient programming and low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate oxide anti-fuse is used, then the anti-fuse can be programmed by voltage breakdown, but high voltage higher than normal IC voltages is required
Solution Approach 1:
The patent uses snapback effect in gate-coupled MOS devices to achieve breakdown at normal operating voltages. By changing the breakdown mechanism from direct gate oxide breakdown to snapback effect, the programming voltage is reduced from high voltage to normal IC voltage levels, resolving the voltage compatibility issue while maintaining programming capability
Solution Approach 2:
The patent replaces the mechanical/high-voltage breakdown mechanism with an electrical snapback mechanism. The snapback effect occurs when the drain-source voltage exceeds a threshold, causing the device to switch to a low-resistance state through carrier multiplication, eliminating the need for high voltage programming
2Ease of manufacture
If poly-silicon fuse is used, then the fuse can be destroyed by electrical signal to open connection, but it is unreliable and may not keep programmed state
Solution Approach 1:
The patent uses gate-coupled MOS devices with specific gate oxide thickness and doping configurations to create a reliable anti-fuse structure. The composite structure of gate, gate oxide, and substrate with controlled parameters ensures both programmability and reliable state retention, overcoming the unreliability of poly-silicon fuses
Solution Approach 2:
The patent employs standard CMOS工艺 to create anti-fuse devices that are inexpensive and can be programmed once. The snapback effect creates a permanent low-resistance state that is reliable for the device lifetime, replacing the unreliable poly-silicon fuse while maintaining manufacturing simplicity
3Reliability
If laser fuse is used, then the metal rod can be destroyed by laser, but it cannot be programmed outside the process flow
Solution Approach 1:
The patent replaces laser-based mechanical destruction with electrical snapback programming. The electrical programming method allows flexible programming outside the process flow, maintaining reliability while improving programming flexibility and ease of operation
Solution Approach 2:
The patent changes the programming mechanism from optical (laser) to electrical (voltage-induced snapback). This parameter change enables programming flexibility while maintaining the reliable permanent state change, allowing programming at any time rather than only during fabrication
4Reliability
If traditional anti-fuse solutions are used, then programming is achieved, but chip area and power consumption are relatively high
Solution Approach 1:
The patent uses a compact anti-fuse cell structure with minimal components. By segmenting the programming function into a dedicated control signal path and using standard CMOS devices, the chip area is reduced while maintaining programming capability and reliability
Solution Approach 2:
The patent employs gate-coupled MOS devices that serve multiple functions: normal circuit operation and anti-fuse programming. This multi-functionality reduces the need for separate programming structures, minimizing chip area while maintaining reliable programming capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides reliable and efficient programmable anti-fuse circuitry with low power consumption and reduced chip area, allowing for programming at normal voltages and enabling the creation of memory circuits and read-only memory with low leakage and minimal additional technology requirements.
Implementation Method 1
said programming voltage causes snapback in one or the other of said gate coupled MOS devices
Data Source
AI summary
Programmable anti-fuse circuitry including at least one anti-fuse cell having a first anti-fuse device coupled between a supply voltage and a first node and a second anti-fuse device coupled between the first node and a ground voltage, and control logic coupled to the first node and arranged to generate a programming voltage having one of at least a first voltage level for breaking-down the first anti-fuse device but not the second anti-fuse device and coupling the first node to the supply voltage; and a second voltage level for breaking-down the second anti-fuse device but not the first anti-fuse device and coupling the first node to the ground voltage.


