Anti-Reflective Coating for Metal Interconnect Patterning

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Solution Overview

Problem

Integrated circuits (ICs) operating at high voltages face challenges in patterning metal interconnect layers due to thick dielectrics acting as anti-reflective coatings, especially at technology nodes below 130 nm, which complicates the fabrication process.

Innovation Solution

A separate anti-reflective coating layer is deposited, allowing independent tuning of its properties to achieve low reflection and high dielectric constant, distinct from the dielectric layer, facilitating the patterning of metal interconnect layers by preventing light reflection during photolithography.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thick dielectric layers are used to meet high-voltage reliability specifications, then breakdown voltage is improved, but light reflection increases making metal interconnect layer patterning difficult

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmetal interconnect layer patterning
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent divides the anti-reflective coating function into a separate layer from the capacitor dielectric layer. The capacitor dielectric (first dielectric layer) maintains thickness for high-voltage reliability, while a separate second dielectric layer provides anti-reflective properties for successful metal interconnect patterning.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second dielectric layer acts as an intermediary between the light source and the thick first dielectric layer. This intermediate layer absorbs or reflects light before it reaches the thick dielectric, preventing the light reflection problems that would otherwise occur with thick dielectric layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If a separate anti-reflective coating layer is deposited, then patterning precision is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improvepatterning precisionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The second dielectric layer serves multiple functions: it provides anti-reflective properties for improved patterning precision, and it also serves as part of the capacitor structure. This multi-functionality reduces overall device complexity despite adding a layer.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the anti-reflective coating function with the capacitor dielectric structure by using a second dielectric layer that serves both purposes. This merging approach avoids the need for a completely separate anti-reflective coating process.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise patterning of metal interconnect layers, improving the fabrication process for high-voltage ICs by optimizing the anti-reflective coating and dielectric properties independently, thereby enhancing the manufacturing efficiency and accuracy.

Implementation Method 1

forming an anti-reflective coating to cover the portion of the capacitor metal layer and the second dielectric layer, and to cover the metal interconnect layer

Methodology Applied
Scientific EffectAnti-reflective coating: Anti-Reflective Coating

Data Source

PatentUS11605587B2Methods for etching metal interconnect layers
Publication Date: 2023.03.14 TEXAS INSTRUMENTS INC
  • US11605587B2 patent drawing
  • US11605587B2 patent drawing
  • US11605587B2 patent drawing

AI summary

In some examples, a method comprises: obtaining a substrate having at a metal interconnect layer deposited over the substrate; forming a first dielectric layer on the metal interconnect layer; forming a second dielectric layer on the first dielectric layer; forming a capacitor metal layer on the second dielectric layer; patterning and etching the capacitor metal layer and the second dielectric layer to the first dielectric layer to leave a portion of the capacitor metal layer and the second dielectric layer on the first dielectric layer; forming an anti-reflective coating to cover the portion of the capacitor metal layer and the second dielectric layer, and to cover the metal interconnect layer; and patterning the metal interconnect layer to form a first metal layer and a second metal layer.