Self-Aligned Anti-Spacer Patterning for Sub-10 Nm CD Control

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Solution Overview

Problem

Current patterning techniques for semiconductor substrates face challenges in achieving sub-10 nm feature sizes due to limitations in lithography resolution, particularly with the Rayleigh criterion, and require innovative multiple patterning methods to overcome these constraints.

Innovation Solution

The method employs self-aligned anti-spacer litho-etch-litho-etch (AS-SALELE) quadruple patterning, where anti-spacers are formed self-aligned to mandrels, allowing for the creation of trenches with precise dimensions and increased feature density by using anti-spacer formation processes like in-diffusion and out-diffusion, enabling the formation of patterns with a pitch of 4P and trench width of P/2, thereby enhancing patterning accuracy and reducing defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional lithography methods are used, then manufacturing process is simple, but manufacturing precision deteriorates due to Rayleigh criterion limitations

Engineering Contradiction:
Improvepatterning precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the patterning process into multiple discrete steps (mandrel formation, anti-spacer formation, etching, removal) to achieve sub-10 nm precision. Each step creates a portion of the final pattern, with the mandrels and anti-spacers segmented to enable self-aligned quadruple patterning that overcomes single-exposure lithography limits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by forming mandrels and anti-spacers before final etching. The anti-spacer material is deposited and patterned in advance, creating a self-aligned structure that defines the final trench pattern. This preliminary structuring enables precise sub-10 nm feature formation that would be impossible with direct lithography alone.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If feature size is reduced to sub-10 nm, then component packing density improves, but manufacturing precision deteriorates due to lithography resolution limits

Engineering Contradiction:
Improvecritical dimension controlVSAvoidlithography resolution
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The patent introduces anti-spacer material as an intermediary element between the mandrel structure and the final etched pattern. This anti-spacer layer acts as a self-aligned mask that transfers the mandrel pattern with enhanced precision, enabling critical dimension control at sub-10 nm scales where direct lithography measurement precision is insufficient.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes material parameters by selecting anti-spacer materials with specific properties (solubility, etch selectivity) that enable precise pattern transfer. The anti-spacer material parameters are optimized to provide self-aligned formation and controlled removal, achieving critical dimension control that transcends lithography resolution limits through material property manipulation rather than direct optical patterning.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If multiple patterning techniques are used, then manufacturing precision improves for sub-10 nm features, but device complexity increases

Engineering Contradiction:
Improvepattern accuracyVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements self-service through self-aligned anti-spacer formation where the anti-spacer material automatically positions itself relative to the mandrels without additional alignment steps. The anti-spacer forms conformally on mandrel sidewalls and is removed selectively, creating a self-directed pattern transfer process that reduces operational complexity despite multiple patterning steps.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges multiple functions into the anti-spacer formation step: the anti-spacer serves as both a structural element defining the final pattern and as a self-aligned etch mask. This merging of pattern definition and masking functions into a single self-aligned process reduces the number of separate alignment and patterning operations, simplifying the overall multiple patterning workflow while maintaining sub-10 nm accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for tighter control over critical dimensions, improved patterning accuracy, and reduced stochastic defects in extreme ultraviolet (EUV) lithography, effectively overcoming the limitations of traditional patterning techniques by quadrupling feature density and enabling the creation of sub-10 nm features.

Implementation Method 1

executing a first anti-spacer formation process to form first trenches along sidewalls of the first structures

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS20230290676A1Self Aligned Multiple Patterning Method
Publication Date: 2023.09.14 TOKYO ELECTRON LTD
  • US20230290676A1 patent drawing
  • US20230290676A1 patent drawing
  • US20230290676A1 patent drawing

AI summary

A method of patterning a substrate, where the method includes: forming first structures over a memorization layer, the first structures including a first row of lines that are parallel with each other and spaced apart from each other; executing a first anti-spacer formation process to form first trenches along sidewalls of the first structures and sidewalls of a first fill material, the first trenches defining a first etch pattern; transferring the first etch pattern into the memorization layer and removing materials above the memorization layer; forming second structures over the memorization layer, the second structures including a second row of lines that are parallel with each other and spaced apart, placement of the second row of lines being shifted relative to the first row of lines; executing a second anti-spacer formation process to form second trenches formed along sidewalls of the second structures and sidewalls of a second fill material, the second trenches defining a second etch pattern; and transferring the second etch pattern into the memorization layer and removing materials above the memorization layer.