Antiferroelectric Interlayer Insulation for Low-Capacitance Semiconductors
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing inter-wiring capacitance and propagation delay due to the use of conventional low dielectric constant materials, which also lead to issues like soft errors and mechanical weaknesses in the interlayer insulation films.
Innovation Solution
Employing antiferroelectric materials with a relative dielectric constant less than 2 for the interlayer insulation films, which are formed below the Curie point to maintain a stable antiferroelectric state, thereby reducing capacitance and enhancing mechanical strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional low dielectric constant materials (SiOCH) are used for interlayer insulation films, then inter-wiring capacitance is reduced, but mechanical strength and reliability deteriorate
Solution Approach 1:
The patent changes the material parameter from conventional SiOCH (k=2.6-2.9) to antiferroelectric material (k<2.0), achieving lower dielectric constant while maintaining mechanical strength through the unique crystal structure and bonding characteristics of antiferroelectric materials
Solution Approach 2:
The patent employs composite structure by combining antiferroelectric material properties (low dielectric constant) with adequate mechanical strength characteristics, creating an interlayer insulation film that simultaneously achieves low capacitance and high reliability
2Loss of energy
If conventional low dielectric constant materials are used for interlayer insulation films, then inter-wiring capacitance is reduced, but soft errors increase
Solution Approach 1:
The patent changes the material composition to antiferroelectric material with lower dielectric constant (k<2.0), which reduces the capacitance effect that amplifies noise and leads to soft errors, while the material's inherent properties provide better noise immunity
3Productivity
If semiconductor elements are highly integrated and miniaturized, then device functionality is improved, but propagation delay increases
Solution Approach 1:
The patent reduces the dielectric constant parameter of the interlayer insulation film to below 2.0, which decreases the capacitance between closely-spaced wirings and reduces the RC time constant, thereby maintaining fast signal propagation despite miniaturization and high integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of antiferroelectric materials in interlayer insulation films achieves reduced inter-wiring capacitance, suppresses propagation delay, minimizes soft errors, and prevents mechanical failures, enabling high integration and miniaturization of semiconductor devices.
Implementation Method 1
The minimum value of the relative dielectric constant of the interlayer insulation film is less than 2
Implementation Method 2
In the second step, a temperature of the interlayer insulation film is set less than the Curie point of the antiferroelectric
Data Source
AI summary
A semiconductor device has an interlayer insulation film made of antiferroelectric. The minimum value of a relative dielectric constant of the interlayer insulation film is less than 2.