Antiferroelectric Isolation Film for Low-Capacitance Soft Error Suppression

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing isolation film capacitance while maintaining low relative dielectric constants, leading to increased soft error occurrence due to cosmic rays and electrostatic discharge (ESD), especially when using materials with dielectric constants lower than silicon oxide.

Innovation Solution

Employing an antiferroelectric material for the isolation film with a relative dielectric constant less than 2, formed below its Curie point to maintain low susceptibility and capture abnormal charges, thereby suppressing soft errors and reducing capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a material with relative dielectric constant lower than silicon oxide is used for the isolation film, then the capacitance of the isolation film is reduced, but the occurrence of soft errors increases

Engineering Contradiction:
Improveisolation film capacitanceVSAvoidsoft error suppression
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent changes the material parameter of the isolation film from conventional low dielectric constant materials to antiferroelectric materials, which have even lower dielectric constants (less than 2). This parameter change enables further capacitance reduction while the unique antiferroelectric properties provide enhanced soft error suppression capability through their electrical characteristics.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs antiferroelectric materials as composite or alternative material for the isolation film structure. These materials combine low dielectric constant properties with specific electrical characteristics that suppress soft errors, creating a composite solution that addresses both capacitance reduction and reliability requirements simultaneously.

Inventive Principle:
Principle #40Composite materials

2Speed

If the relative dielectric constant of the isolation film is reduced, then the operating speed increases, but the susceptibility to abnormal charges increases

Engineering Contradiction:
Improveoperating speedVSAvoidsusceptibility to abnormal charges
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent utilizes the temperature-dependent parameter changes of antiferroelectric materials. By controlling the temperature below the Curie point, the material maintains low dielectric constant for high operating speed while its antiferroelectric properties provide natural suppression of abnormal charge effects, resolving the contradiction between speed and susceptibility.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts the potential harm of low dielectric constant materials (increased susceptibility to abnormal charges) into a benefit by using antiferroelectric materials. These materials' unique electrical properties actually suppress abnormal charge effects, turning what would be a harmful characteristic into a beneficial one for soft error suppression.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If antiferroelectric material is used for isolation film, then soft errors are suppressed, but the manufacturing complexity increases due to Curie point control

Engineering Contradiction:
Improvesoft error suppressionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent utilizes the phase transition properties of antiferroelectric materials at the Curie point. By controlling the temperature to remain below the Curie point during manufacturing and operation, the material maintains its desired electrical properties. This phase transition control, while adding a process parameter, provides a clear and manageable criterion for manufacturing rather than vague complexity.

Inventive Principle:
Principle #36Phase transitions

Solution Approach 2:

The patent replaces conventional isolation film materials with antiferroelectric materials, substituting one material system for another. While this changes the material chemistry, it provides a systematic approach with well-defined processing conditions (temperature control below Curie point), making the manufacturing complexity manageable through established thermal processing techniques rather than introducing fundamentally new manufacturing challenges.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The antiferroelectric isolation film effectively suppresses soft errors and reduces capacitance, enabling high integration, miniaturization, and increased operating speed while minimizing chip area and leakage current.

Implementation Method 1

The isolation film is made of an antiferroelectric. A minimum value of a relative dielectric constant of the isolation film is less than 2.

Methodology Applied
Scientific EffectAntiferroelectricity:

Implementation Method 2

A minimum value of a relative dielectric constant of the isolation film is less than 2

Methodology Applied
Scientific EffectDielectric permittivity: Dielectric Permittivity

Implementation Method 3

the isolation film made of an antiferroelectric is formed by heating to a temperature lower than a Curie point of the antiferroelectric

Methodology Applied
Scientific EffectCurie point: Curie Point (piezoelectric)

Data Source

PatentUS20250338569A1Semiconductor device and method of manufacturing the same
Publication Date: 2025.10.30 RENESAS ELECTRONICS CORP
  • US20250338569A1 patent drawing
  • US20250338569A1 patent drawing
  • US20250338569A1 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate including a single crystal layer, a plurality of semiconductor elements formed on the single crystal layer, and an isolation film which is formed in the semiconductor substrate so as to surround each of the plurality of semiconductor elements in plan view and isolates the plurality of semiconductor elements from one another. The isolation film is made of an antiferroelectric. A minimum value of a relative dielectric constant of the isolation film is less than 2.