Anti-Fuse Array Reliability via Local Quality

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Solution Overview

Problem

Memory devices face challenges in maintaining reliability due to faulty elements, which can lead to inconsistent data storage and retrieval, especially when anti-fuses used for addressing and enabling/disabling functions are unreliable, potentially causing the entire memory array to perform unpredictably.

Innovation Solution

The implementation of an array of anti-fuses with a combination of lower and higher reliability configurations, where anti-fuses used for addressing are in a lower reliability configuration and those for enabling/disabling are in a higher reliability configuration, along with the use of OR or XOR gates to ensure reliable data storage and retrieval, and the inclusion of a repair array to redirect faulty addresses, thereby maintaining memory array reliability without increasing the footprint significantly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If anti-fuses with high reliability configuration are used for all functions (addressing and enabling/disabling), then the reliability of the memory device is improved, but the area occupied by the anti-fuse array increases significantly

Engineering Contradiction:
Improvememory device reliabilityVSAvoidanti-fuse array footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by differentiating the reliability configuration of anti-fuses based on their specific functions. Anti-fuses for addressing purposes use a lower reliability configuration to save area, while anti-fuses for enabling/disabling functions use a higher reliability configuration to ensure critical operations. This localized differentiation resolves the contradiction by optimizing each component according to its functional requirements rather than uniformly maximizing reliability across the board.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the anti-fuse array into different blocks with different reliability configurations based on functional requirements. The first block contains anti-fuses for addressing with lower reliability configuration, while the second block contains anti-fuses for enabling/disabling with higher reliability configuration. This segmentation allows the system to achieve high reliability where needed while minimizing area consumption elsewhere.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If anti-fuses with lower reliability configuration are used for addressing functions, then the area occupied by the anti-fuse array is reduced, but the reliability of the memory device deteriorates

Engineering Contradiction:
Improveanti-fuse array footprintVSAvoidmemory device reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the reliability configuration of anti-fuses based on their specific functions. Anti-fuses for addressing purposes use a lower reliability configuration to save area, while anti-fuses for enabling/disabling functions use a higher reliability configuration to ensure critical operations. This localized differentiation resolves the contradiction by optimizing each component according to its functional requirements rather than uniformly maximizing reliability across the board.

Inventive Principle:
Principle #3Local quality

3Reliability

If a repair array is implemented to replace faulty elements, then the reliability of the memory device is improved, but the device complexity increases

Engineering Contradiction:
Improvememory device reliabilityVSAvoidmemory device structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the repair array functionality with the existing anti-fuse array structure. The repair array is integrated into the same chip and shares the same address space and control mechanisms as the main memory array. Faulty elements in the main array are mapped to corresponding locations in the repair array using the anti-fuse configuration, allowing the system to handle failures without requiring a completely separate replacement mechanism. This merging approach reduces the complexity increase that would result from a standalone repair system.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11468965B2Apparatus and techniques for programming anti-fuses to repair a memory device
Publication Date: 2022.10.11 MICRON TECHNOLOGY INC
  • US11468965B2 patent drawing
  • US11468965B2 patent drawing
  • US11468965B2 patent drawing

AI summary

Methods, systems, and devices for programming anti-fuses are described. An apparatus may include a repair array including elements for replacing faulty elements in a memory array and may further include an array of anti-fuses for indicating which, if any, elements of the memory array are being replaced by elements within the repair array. The array of anti-fuses may indicate an address of an element of the memory array being replaced by an element within the repair array. The array of anti-fuses may indicate an enablement or disablement of the element within the repair array indicating whether the element within the repair array is enabled to replace the element of the memory array. The array of anti-fuses may include anti-fuses with lower reliability and anti-fuses with higher reliability. An anti-fuse associated with the enabling of the element within the repair array may include an anti-fuse having the higher reliability.