Anti-fuse Circuit Serial Programming Verification
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Solution Overview
Problem
Conventional anti-fuse circuits face issues with variable programmed resistance and limited programming voltage due to the presence of other circuitry, making it difficult to determine if programming is complete and inconvenient for memory address programming.
Innovation Solution
An anti-fuse circuit with programmable units and a test module that serially transmits program data and compares programming results with input data, using a stress voltage and write enable signal to ensure programming completion and facilitate memory address programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high programming voltage is applied externally to the anti-fuse, then the dielectric breakdown and electrical connection are established, but the programmed resistance varies over a considerable range and is often far higher than desired
Solution Approach 1:
The patent implements a feedback mechanism where the programming result is automatically tested and verified. The test module compares the actual programming result with the expected program data, and only when they match does the system confirm successful programming. This closed-loop feedback ensures reliable programming completion verification while maintaining precise resistance control through iterative validation.
2Device complexity
If the magnitude of programming voltage is limited due to the presence of other circuitry, then circuit integration is maintained, but the anti-fuse programming becomes difficult or incomplete
Solution Approach 1:
The patent applies preliminary action by pre-charging capacitors to a high voltage level before the actual anti-fuse programming occurs. This pre-charged energy is then discharged through the anti-fuse during a controlled time period, generating sufficient voltage for reliable dielectric breakdown without requiring the external circuitry to sustain high voltage continuously. This approach enables complete programming while maintaining circuit integration.
3Productivity
If conventional anti-fuse programming is performed without serial transmission, then programming speed may be faster, but it is difficult to check whether programming finishes and inconvenient for memory address programming
Solution Approach 1:
The patent implements serial programming with built-in feedback where each byte of program data is transmitted sequentially and immediately verified. The test module compares each programmed byte with the corresponding expected data, providing real-time feedback on programming completion and accuracy. This approach maintains high productivity through efficient serial transmission while ensuring ease of operation through automatic verification at each step.
4Device complexity
If the programmed resistance is far higher than desired, then the anti-fuse structure is simpler, but the electrical connection quality is poor
Solution Approach 1:
The patent uses preliminary action by pre-charging capacitors to a high voltage level before discharging through the anti-fuse. This pre-charged energy delivers a concentrated voltage pulse that ensures complete dielectric breakdown and creates a low-resistance conductive path, improving electrical connection quality while maintaining the simplicity of the anti-fuse structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables easy verification of programming completion and convenient memory address programming by outputting different logic levels based on comparison results, reducing variability and voltage limitations.
Implementation Method 1
The dielectric is changed into a conductive regime by applying a differential voltage between the plates, where the differential voltage is sufficient to break down the dielectric
Data Source
AI summary
An anti-fuse circuit including a plurality of programmable units and a test module is provided. The programmable units receive a stress voltage, a program data, and a write enable signal. During a programming period, the programmable units sequentially transmit the program data. When the write enable signal is enabled, the stress voltage stresses the programmable units according to the program data, and the programmable units output programming results for test. The test module is coupled to the programmable units and receives the program data and the programming results. During a test period, the test module compares the programming results with the program data and outputs different logic levels according to a result of the comparison of the first programming results and the program data. A method for anti-fuse programming and test adapted to the foregoing anti-fuse circuit is also provided.