Anti-Fuse Semiconductor Structure With Region-Specific Dielectric Layers
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Solution Overview
Problem
The high programming voltage of anti-fuse device structures in semiconductor structures is a challenge due to the thick dielectric layer used in existing methods.
Innovation Solution
A method involving the sequential formation of a first and second dielectric layer on a substrate, where the second dielectric layer has a higher dielectric constant than the first, with the second layer being removed from the anti-fuse device region, and a conductive layer is formed on the remaining dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick dielectric layer is used in the anti-fuse device structure, then the reliability of the core device structure is improved, but the programming voltage of the anti-fuse device structure becomes high
Solution Approach 1:
The dielectric layer is segmented into two distinct layers: a first dielectric layer (thin, low-k) in the anti-fuse device region and a second dielectric layer (thick, high-k) in the core device region. This segmentation allows each region to have optimized dielectric properties - the anti-fuse region achieves low programming voltage while the core device region maintains high reliability
Solution Approach 2:
Different dielectric layer configurations are applied to different regions of the substrate. The anti-fuse device region receives a thin first dielectric layer with low dielectric constant, while the core device region receives a thick second dielectric layer with high dielectric constant. This local quality differentiation resolves the contradiction by tailoring the dielectric properties to the specific functional requirements of each region
2Use of energy by moving object
If a thin dielectric layer is used in the anti-fuse device structure, then the programming voltage is reduced, but the reliability of the core device structure deteriorates
Solution Approach 1:
The dielectric layer is segmented into two distinct layers: a first dielectric layer (thin, low-k) in the anti-fuse device region and a second dielectric layer (thick, high-k) in the core device region. This segmentation allows each region to have optimized dielectric properties - the anti-fuse region achieves low programming voltage while the core device region maintains high reliability
Solution Approach 2:
Different dielectric layer configurations are applied to different regions of the substrate. The anti-fuse device region receives a thin first dielectric layer with low dielectric constant, while the core device region receives a thick second dielectric layer with high dielectric constant. This local quality differentiation resolves the contradiction by tailoring the dielectric properties to the specific functional requirements of each region
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the programming voltage of the anti-fuse device structure while maintaining the reliability of the core device structure by creating a thin film with a small dielectric constant between the conductive layer and substrate in the anti-fuse region and a thick film with a large dielectric constant in the core region.
Implementation Method 1
forming a second dielectric layer covering the first dielectric layer and having a dielectric constant larger than a dielectric constant of the first dielectric layer; removing the second dielectric layer on the anti-fuse device region
Data Source
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AI summary
The present application relates to the technical field of semiconductors, and in particular to a semiconductor structure and a manufacturing method therefor, used for solving the technical problem that the programming voltage of an anti-fuse device structure is high. The manufacturing method for the semiconductor structure comprises: providing a substrate, the substrate comprising a core device region and an anti-fuse device region; forming a first dielectric layer, the first dielectric layer covering the core device region and the anti-fuse device region; forming a second dielectric layer, the second dielectric layer covering the first dielectric layer, and a dielectric constant of the second dielectric layer being greater than a dielectric constant of the first dielectric layer; removing the second dielectric layer on the anti-fuse device region; and forming a conductive layer, the conductive layer covering the first dielectric layer on the anti-fuse device region and the second dielectric layer on the core device region. The second dielectric layer on the anti-fuse device region is removed, so that a film layer, located between the conductive layer and the substrate, on the anti-fuse device region is thin and has a small dielectric constant, and thus the programming voltage of the subsequently formed anti-fuse device structure is reduced.