Antifuse OTP Memory Hybrid Junctions Area Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Antifuse One-Time Programmable (OTP) memory technology faces challenges in achieving higher integration density and programming yield due to the need for high voltage junctions that occupy more silicon area, increasing costs and requiring thinner gate dielectrics for easier programming.

Innovation Solution

The implementation of a novel hybrid high voltage/low voltage junction in both the select transistor and antifuse capacitor, utilizing a combination of lightly and deeply doped regions to enable high voltage programming while minimizing silicon area, improves programming yield and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If high voltage junctions are used to program the antifuse capacitor, then programming capability is achieved, but silicon area increases

Engineering Contradiction:
Improveprogramming capabilityVSAvoidsilicon area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent applies different junction types (high voltage and low voltage) to different regions of the select transistor. Specifically, one junction is designed as high voltage for programming operations while the other is low voltage, allowing each region to have optimized properties for its specific function rather than requiring the entire transistor to be high voltage

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The select transistor is segmented into two distinct junction regions with different voltage characteristics. This segmentation allows the transistor to perform both high voltage programming and low voltage operation, reducing the overall silicon area compared to using a complete high voltage transistor structure

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If thinner gate dielectric is used for easier programming, then programming ease is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveprogramming easeVSAvoidgate dielectric thickness control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the voltage parameter (applying high voltage during programming) to achieve easier programming without necessarily requiring extremely thin gate dielectric. The high voltage programming mechanism allows effective programming with gate dielectric thickness that balances ease of programming and manufacturing precision requirements

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for high voltage programming with reduced silicon area requirements, enhancing integration density and programming yield in antifuse OTP memory cells.

Implementation Method 1

a first high-voltage junction formed in the substrate, and a first low-voltage junction formed in the substrate, wherein a source and a drain for the select transistor are respectively formed the first high-voltage junction and the first low-voltage junction

Methodology Applied
Scientific EffectJunction breakdown: Avalanche Breakdown

Implementation Method 2

utilizing a combination of lightly and deeply doped regions

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 3

To program an antifuse, a high voltage is applied between the two conductors. This leads to a physical and permanent breakdown of the thin dielectric layer and the formation of a current conduction path between the two conductors

Methodology Applied
Scientific EffectDielectric breakdown: Avalanche Breakdown

Data Source

PatentUS11296096B2Antifuse OTP structure with hybrid junctions
Publication Date: 2022.04.05 ZHUHAI CHUANGFEIXIN TECH CO LTD
  • US11296096B2 patent drawing
  • US11296096B2 patent drawing
  • US11296096B2 patent drawing

AI summary

An antifuse One-Time-Programmable memory cell includes a substrate, a select transistor, and an antifuse capacitor. The select transistor includes a first high-voltage junction formed in the substrate and a first low-voltage junction formed in the substrate. The antifuse capacitor includes a second high-voltage junction formed in the substrate and a second low-voltage junction formed in the substrate.