Semiconductor Anti-Fuse Layout for Higher Programming Current

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Solution Overview

Problem

Existing semiconductor devices with electrically programmable fuses (e-fuses) face challenges in optimizing design for increased current capacity while maintaining programming voltage.

Innovation Solution

The semiconductor device design includes a substrate with a first and second insulative film, first and second electrodes, capping layers, first and second impurity regions, and doped extension regions. The second electrode is disposed over the first electrode, and the impurity regions are designed to form transistors electrically connected in parallel, enhancing current capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the programming voltage is increased to achieve higher current capacity, then the current capacity is improved, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvecurrent capacityVSAvoiddevice complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The device is divided into two parallel transistor structures (first transistor with first source/drain regions and second transistor with second source/drain regions) that share a common gate electrode. This segmentation allows the current capacity to be effectively doubled without increasing the programming voltage, as the total current is the sum of currents through both parallel transistors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Two transistor structures are merged into a single integrated device with shared components (gate electrode, insulative films, substrate) while maintaining parallel current paths. This merging achieves higher current capacity through parallel conduction paths without proportionally increasing device complexity, as shared components reduce the total component count.

Inventive Principle:
Principle #5Merging (Combining)

2Power

If the programming voltage is increased to achieve higher current capacity, then the current capacity is improved, but the manufacturing precision requirements worsen

Engineering Contradiction:
Improvecurrent capacityVSAvoidmanufacturing precision
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

The insulative films are formed on the substrate before the source/drain regions are created. This preliminary formation of the insulative layer structure provides a stable foundation that simplifies subsequent doping and electrode formation processes, reducing the precision requirements for later manufacturing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The first and second source/drain regions are formed through a self-aligned doping process where the insulative films and electrode structures automatically define the doping regions. This self-alignment eliminates the need for separate alignment steps, significantly reducing manufacturing precision requirements.

Inventive Principle:
Principle #25Self-service

3Device complexity

If a single transistor structure is used, then the device complexity is reduced, but the current capacity is insufficient

Engineering Contradiction:
Improvedevice complexityVSAvoidcurrent capacity
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The device transitions from a single-transistor one-dimensional structure to a parallel dual-transistor two-dimensional arrangement. By utilizing the parallel dimension, the current capacity is effectively doubled without requiring a proportional increase in device area or complexity, as both transistors share common components.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design allows for increased current capacity during programming without requiring higher programming voltage, thereby improving the efficiency and reliability of semiconductor devices with e-fuses.

Implementation Method 1

The plurality of first impurity regions and the plurality of second impurity regions comprise n-type dopant species

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

The first insulative film and the second insulative film are thermally-grown silicon oxide films

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Data Source

PatentUS12272413B2Method of manufacturing an electrically programmable semiconductor anti-fuse device that includes utilizing previously fabricated device elements as masks for subsequently fabricated elements
Publication Date: 2025.04.08 NAN YA TECH
  • US12272413B2 patent drawing
  • US12272413B2 patent drawing
  • US12272413B2 patent drawing

AI summary

A method of fabricating a semiconductor device includes steps of forming a first insulative film on a substrate; forming a first electrode on the first insulative film; implanting dopants in the substrate to form a plurality of first impurity regions on either side of the first electrode; depositing a capping layer to cover the first electrode; forming a second insulative film on portions of the substrate exposed through the first electrode and the capping layer; forming a second electrode disposed over the capping layer and portions of the second insulative film; removing portions of the second insulative film on either side of the second electrode; and implanting dopants in portions of the substrate exposed by the second insulative film to form a plurality of second impurity regions. With the configurations of semiconductor device, the current for blowing the semiconductor device can increase while applying the same programming voltage.