Anti-fuse Memory Cell Leakage Current Reduction
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Solution Overview
Problem
As the line width of semiconductor memory devices shrinks, it leads to leakage current in memory cells, affecting the performance of anti-fuse memory devices.
Innovation Solution
The anti-fuse memory design eliminates the channel region and other regions between the lightly-doped drain (LDD) region and the isolation structure, allowing the second gate insulating layer under the anti-fuse gate to break down and form a conductive path during programming, thereby avoiding leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the line width of the memory device is shrunk to increase integration, then the device size is reduced and integration is improved, but leakage current increases affecting performance
Solution Approach 1:
The patent extracts and eliminates the channel region from the memory cell structure by positioning the lightly-doped drain region to contact the isolation structure directly. This removal of the channel region eliminates the source of leakage current while preserving the essential memory functionality, thereby resolving the contradiction between integration and leakage current.
Solution Approach 2:
Instead of reducing line width to improve integration (conventional approach), the patent inverts the approach by eliminating the channel region entirely and using the lightly-doped drain region to contact the isolation structure. This inverted structural design achieves integration improvement without the harmful side effect of increased leakage current.
2Reliability
If a channel region is present in the memory cell, then the device structure is complete and functional, but parasitic diodes form during programming increasing threshold voltage
Solution Approach 1:
The patent extracts and removes the channel region from the memory cell structure. By positioning the lightly-doped drain region to contact the isolation structure directly, the channel region is eliminated, preventing parasitic diode formation during programming operations while maintaining essential device functionality through the anti-fuse mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively prevents leakage current and the increase in threshold voltage caused by parasitic diodes or halo/pocket implant regions, enhancing the performance and reliability of anti-fuse memory devices.
Implementation Method 1
an anti-fuse layer is broken down (burned out at a high temperature) by applying a voltage to make current flow through the anti-fuse layer to form a conductive path
Data Source
AI summary
Provided is an anti-fuse memory including a anti-fuse memory cell including an isolation structure, a select gate, first and second gate insulating layers, an anti-fuse gate, and first, second and third doped regions. The isolation structure is disposed in a substrate. The select gate is disposed on the substrate. The first gate insulating layer is disposed between the select gate and the substrate. The anti-fuse gate is disposed on the substrate and partially overlapped with the isolation structure. The second gate insulating layer is disposed between the anti-fuse gate and the substrate. The first doped region and the second doped region are disposed in the substrate at opposite sides of the select gate, respectively, wherein the first doped region is located between the select gate and the anti-fuse gate. The third doped region is disposed in the substrate and located between the first doped region and the isolation structure.