Antifuse Memory Read Margin Improvement via Adaptive Reference Voltage

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Solution Overview

Problem

Conventional OTP memories with antifuse devices face issues such as increased gate-leak currents due to thinner gate dielectric films, leading to misreading and reduced yield and reliability, especially as MOSFETs shrink, and existing solutions like laser fuse ROMs require specialized equipment and occupy more space.

Innovation Solution

A semiconductor memory device with a memory cell array using antifuse devices that apply high voltage to break down the gate dielectric film, incorporating a sense amplifier and data inversion circuits to manage gate-leak currents and improve read margins, allowing for efficient data writing and reading without increasing chip area or cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the gate dielectric film thickness is decreased to shrink MOSFETs, then the device density is improved, but the gate-leak current increases causing misreading and reduced reliability

Engineering Contradiction:
ImproveMOSFET sizeVSAvoidread accuracy
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent changes the parameter of reference voltage selection based on the detected gate-leak current level. When gate-leak current is detected to be within a normal range, a first reference voltage is used; when gate-leak current exceeds the normal range, a second reference voltage (different from the first) is used. This dynamic parameter adjustment compensates for the increased gate-leak current in smaller MOSFETs, preventing misreading while maintaining high device density.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If error correction circuits are added to address gate-leak current variations, then the reliability is improved, but the chip area increases and cost increases

Engineering Contradiction:
Improveread accuracyVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements self-service by having the memory device itself detect and compensate for gate-leak current variations through built-in detection circuits and adaptive reference voltage selection. The detection circuit measures the actual gate-leak current, and the control circuit automatically selects the appropriate reference voltage without requiring external error correction circuits. This eliminates the need for additional error correction hardware, maintaining small chip area while ensuring high reliability.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If conventional laser fuse ROM is used, then the programming process is simplified, but the device occupies larger area and requires special equipment

Engineering Contradiction:
Improveprogramming processVSAvoidchip area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent replaces the mechanical/laser-based fuse blowing process with an electrical breakdown process. Instead of using laser light to blow fuses, the invention uses electrical voltage to break down the gate dielectric film of MOSFETs, creating antifuse devices. This substitution eliminates the need for special laser fuse programming equipment while achieving compact device dimensions that scale with modern MOSFET technology.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces misreading errors by managing gate-leak currents and improving read margins, enhancing the yield and reliability of OTP memories without the need for additional error correction circuits or increased chip area.

Implementation Method 1

capable of having data written thereto by breakdown of a gate dielectric film of an MOS transistor by application of a high voltage

Methodology Applied
Scientific EffectDielectric breakdown: Dielectric

Implementation Method 2

a sense amplifier comparing the bit-line's voltage and a reference voltage and determining a difference therebetween

Methodology Applied
Scientific EffectVoltage comparison: Electric Field

Data Source

PatentUS7619914B2Semiconductor memory device
Publication Date: 2009.11.17 KIOXIA CORP
  • US7619914B2 patent drawing
  • US7619914B2 patent drawing
  • US7619914B2 patent drawing

AI summary

A memory cell includes an antifuse device that is capable of having data written thereto by breakdown of a gate dielectric film by application of a high voltage. A data inversion portion generates, according to a relationship between the sense amplifier's determination and write data to be written to the memory cell, inverted write data obtained by inverting the write data. The data inversion portion also inverts, when data is read from the memory cell to which the inverted write data is written, the read data and reads it.