Antifuse Memory Gate Electrode Segmentation for Voltage Uniformity
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Solution Overview
Problem
Existing nonvolatile memory devices face challenges in providing uniform voltage to programming and reading gates, which affects the reliability and efficiency of antifuse memory cells.
Innovation Solution
The design incorporates a nonvolatile memory device with a specific arrangement of transistors, gate electrodes, and strap contacts that allow for uniform voltage application to the entire programming and reading gates, including the use of rupture transistors and access transistors forming fuse circuits, and strategically positioned strap contacts to connect the gate electrodes and wiring lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional memory device structure is used, then the device complexity is reduced, but the voltage uniformity across programming and reading gates deteriorates
Solution Approach 1:
The gate electrode is divided into multiple segments (first gate electrode and second gate electrode) that can be independently controlled. This segmentation allows uniform voltage distribution across different regions of the memory device, solving the voltage uniformity problem while maintaining manageable device complexity through modular design
Solution Approach 2:
The patent introduces a vertical dimension by stacking memory cell arrays in multiple layers with intermediate substrates. This three-dimensional arrangement enables uniform voltage distribution across programming and reading gates by providing additional pathways for voltage application, resolving the contradiction between reliability and structural complexity
2Reliability
If strap contacts are sparsely arranged, then the manufacturing precision is reduced, but the device complexity is lowered
Solution Approach 1:
Strap contacts are strategically positioned at specific locations (e.g., at ends or intermediate positions of gate electrodes) rather than uniformly distributed. This local optimization ensures effective voltage application to programming and reading gates while minimizing the total number of contacts, thus improving programming efficiency without excessive device complexity
Solution Approach 2:
The strap contacts serve multiple functions: they provide voltage application paths for both programming and reading operations, and they enable control of multiple gate electrodes through shared contact structures. This multi-functionality improves programming efficiency while reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures consistent and efficient voltage distribution across the memory cells, enhancing the reliability and performance of the antifuse memory device.
Implementation Method 1
programmed by electrically short-circuiting with a breakdown mechanism when a high voltage is applied to a thin gate oxide layer
Implementation Method 2
When a sufficiently high voltage is applied to the terminals, silicon dioxide or such non-conductive material becomes a short circuit or a low-resistance conductive path between the two terminals
Data Source
AI summary
A memory device includes first through fourth active regions arranged sequentially along a first direction, and which extend along a second direction different from the first direction; a first gate electrode formed on the first through fourth active regions to intersect the first through fourth active regions, and extending along the first direction; a second gate electrode formed on the first through fourth active regions to intersect the first through fourth active regions, extending along the second direction, and arranged so that no other gate electrodes are between the first gate electrode and the second gate electrode in the second direction; the first gate electrode extending between a first end and a second end;a first wiring line which is formed on the first gate electrode; a first strap contact, which connects the first wiring line and the first gate electrode between the first active region and the second active region; and a second strap contact, which connects the first wiring line and the first gate electrode between the third active region and the fourth active region.